102 lines
3.2 KiB
LLVM
102 lines
3.2 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=m68k -verify-machineinstrs | FileCheck %s
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define zeroext i8 @umul_i8(i8 signext %a, i8 signext %b) nounwind ssp {
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; CHECK-LABEL: umul_i8:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: move.b (11,%sp), %d0
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; CHECK-NEXT: and.l #255, %d0
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; CHECK-NEXT: move.b (7,%sp), %d1
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; CHECK-NEXT: and.l #255, %d1
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; CHECK-NEXT: muls %d0, %d1
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; CHECK-NEXT: move.l %d1, %d0
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; CHECK-NEXT: and.l #65535, %d0
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; CHECK-NEXT: and.l #255, %d0
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; CHECK-NEXT: rts
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entry:
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%umul = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %a, i8 %b)
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%cmp = extractvalue { i8, i1 } %umul, 1
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%umul.result = extractvalue { i8, i1 } %umul, 0
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%X = select i1 %cmp, i8 42, i8 %umul.result
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ret i8 %X
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}
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define zeroext i8 @umul_i8_no_ovf(i8 signext %a, i8 signext %b) nounwind ssp {
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; CHECK-LABEL: umul_i8_no_ovf:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: move.l #42, %d0
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; CHECK-NEXT: rts
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entry:
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%umul = tail call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %a, i8 %b)
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%cmp = extractvalue { i8, i1 } %umul, 1
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%umul.result = extractvalue { i8, i1 } %umul, 0
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%X = select i1 %cmp, i8 %umul.result, i8 42
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ret i8 %X
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}
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declare { i8, i1 } @llvm.umul.with.overflow.i8(i8, i8) nounwind readnone
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define zeroext i16 @umul_i16(i16 signext %a, i16 signext %b) nounwind ssp {
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; CHECK-LABEL: umul_i16:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: move.w (6,%sp), %d0
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; CHECK-NEXT: move.w (10,%sp), %d1
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; CHECK-NEXT: muls %d1, %d0
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; CHECK-NEXT: and.l #65535, %d0
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; CHECK-NEXT: rts
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entry:
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%umul = tail call { i16, i1 } @llvm.umul.with.overflow.i16(i16 %a, i16 %b)
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%cmp = extractvalue { i16, i1 } %umul, 1
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%umul.result = extractvalue { i16, i1 } %umul, 0
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%X = select i1 %cmp, i16 42, i16 %umul.result
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ret i16 %X
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}
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declare { i16, i1 } @llvm.umul.with.overflow.i16(i16, i16) nounwind readnone
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declare {i32, i1} @llvm.umul.with.overflow.i32(i32 %a, i32 %b)
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define i1 @a(i32 %x) nounwind {
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; CHECK-LABEL: a:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: move.l #3, %d0
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; CHECK-NEXT: move.l (4,%sp), %d1
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; CHECK-NEXT: mulu.l %d0, %d1
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; CHECK-NEXT: svs %d0
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; CHECK-NEXT: rts
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%res = call {i32, i1} @llvm.umul.with.overflow.i32(i32 %x, i32 3)
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%obil = extractvalue {i32, i1} %res, 1
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ret i1 %obil
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}
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define i32 @test2(i32 %a, i32 %b) nounwind readnone {
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; CHECK-LABEL: test2:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: move.l (8,%sp), %d0
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; CHECK-NEXT: add.l (4,%sp), %d0
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; CHECK-NEXT: add.l %d0, %d0
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; CHECK-NEXT: rts
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entry:
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%tmp0 = add i32 %b, %a
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%tmp1 = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %tmp0, i32 2)
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%tmp2 = extractvalue { i32, i1 } %tmp1, 0
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ret i32 %tmp2
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}
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; It shouldn't fallback to builtin in this scenario
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; Since we don't need the overflow bit here
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define i32 @test3(i32 %a, i32 %b) nounwind readnone {
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; CHECK-LABEL: test3:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: move.l (8,%sp), %d0
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; CHECK-NEXT: add.l (4,%sp), %d0
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; CHECK-NEXT: move.l #4, %d1
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; CHECK-NEXT: mulu.l %d1, %d0
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; CHECK-NEXT: rts
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entry:
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%tmp0 = add i32 %b, %a
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%tmp1 = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %tmp0, i32 4)
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%tmp2 = extractvalue { i32, i1 } %tmp1, 0
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ret i32 %tmp2
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}
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