344 lines
13 KiB
Text
344 lines
13 KiB
Text
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefix=GCN
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefix=VI
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s -check-prefix=GFX11
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---
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name: fptosi_s32_to_s32_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: fptosi_s32_to_s32_vv
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: $vgpr0 = COPY %1
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; VI-LABEL: name: fptosi_s32_to_s32_vv
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; VI: liveins: $vgpr0
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; VI-NEXT: {{ $}}
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; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; VI-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; VI-NEXT: $vgpr0 = COPY %1
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; GFX11-LABEL: name: fptosi_s32_to_s32_vv
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; GFX11: liveins: $vgpr0
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX11-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GFX11-NEXT: $vgpr0 = COPY %1
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = G_FPTOSI %0
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$vgpr0 = COPY %1
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...
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---
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name: fptosi_s32_to_s32_vs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: fptosi_s32_to_s32_vs
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; GCN: liveins: $sgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: $vgpr0 = COPY %1
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; VI-LABEL: name: fptosi_s32_to_s32_vs
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; VI: liveins: $sgpr0
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; VI-NEXT: {{ $}}
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; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; VI-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; VI-NEXT: $vgpr0 = COPY %1
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; GFX11-LABEL: name: fptosi_s32_to_s32_vs
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; GFX11: liveins: $sgpr0
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX11-NEXT: %1:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GFX11-NEXT: $vgpr0 = COPY %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = G_FPTOSI %0
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$vgpr0 = COPY %1
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...
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---
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name: fptosi_s32_to_s32_fneg_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: fptosi_s32_to_s32_fneg_vv
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 1, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: $vgpr0 = COPY %2
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; VI-LABEL: name: fptosi_s32_to_s32_fneg_vv
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; VI: liveins: $vgpr0
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; VI-NEXT: {{ $}}
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; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; VI-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 1, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; VI-NEXT: $vgpr0 = COPY %2
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; GFX11-LABEL: name: fptosi_s32_to_s32_fneg_vv
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; GFX11: liveins: $vgpr0
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX11-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e64 1, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GFX11-NEXT: $vgpr0 = COPY %2
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = G_FNEG %0
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%2:vgpr(s32) = G_FPTOSI %1
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$vgpr0 = COPY %2
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...
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---
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name: fptosi_s16_to_s32_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: fptosi_s16_to_s32_vv
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: %3:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %3, implicit $mode, implicit $exec
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; GCN-NEXT: $vgpr0 = COPY %2
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; VI-LABEL: name: fptosi_s16_to_s32_vv
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; VI: liveins: $vgpr0
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; VI-NEXT: {{ $}}
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; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; VI-NEXT: %3:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; VI-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %3, implicit $mode, implicit $exec
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; VI-NEXT: $vgpr0 = COPY %2
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; GFX11-LABEL: name: fptosi_s16_to_s32_vv
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; GFX11: liveins: $vgpr0
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX11-NEXT: %3:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GFX11-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %3, implicit $mode, implicit $exec
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; GFX11-NEXT: $vgpr0 = COPY %2
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s16) = G_TRUNC %0
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%2:vgpr(s32) = G_FPTOSI %1
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$vgpr0 = COPY %2
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...
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---
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name: fptosi_s16_to_s32_vs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: fptosi_s16_to_s32_vs
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; GCN: liveins: $sgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GCN-NEXT: %3:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %3, implicit $mode, implicit $exec
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; GCN-NEXT: $vgpr0 = COPY %2
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; VI-LABEL: name: fptosi_s16_to_s32_vs
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; VI: liveins: $sgpr0
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; VI-NEXT: {{ $}}
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; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; VI-NEXT: %3:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; VI-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %3, implicit $mode, implicit $exec
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; VI-NEXT: $vgpr0 = COPY %2
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; GFX11-LABEL: name: fptosi_s16_to_s32_vs
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; GFX11: liveins: $sgpr0
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX11-NEXT: %3:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GFX11-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %3, implicit $mode, implicit $exec
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; GFX11-NEXT: $vgpr0 = COPY %2
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s16) = G_TRUNC %0
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%2:vgpr(s32) = G_FPTOSI %1
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$vgpr0 = COPY %2
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...
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---
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name: fptosi_s16_to_s32_fneg_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: fptosi_s16_to_s32_fneg_vv
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
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; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec
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; GCN-NEXT: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %4, implicit $mode, implicit $exec
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; GCN-NEXT: $vgpr0 = COPY %3
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; VI-LABEL: name: fptosi_s16_to_s32_fneg_vv
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; VI: liveins: $vgpr0
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; VI-NEXT: {{ $}}
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; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
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; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec
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; VI-NEXT: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec
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; VI-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %4, implicit $mode, implicit $exec
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; VI-NEXT: $vgpr0 = COPY %3
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; GFX11-LABEL: name: fptosi_s16_to_s32_fneg_vv
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; GFX11: liveins: $vgpr0
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX11-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
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; GFX11-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec
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; GFX11-NEXT: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec
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; GFX11-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %4, implicit $mode, implicit $exec
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; GFX11-NEXT: $vgpr0 = COPY %3
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s16) = G_TRUNC %0
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%2:vgpr(s16) = G_FNEG %1
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%3:vgpr(s32) = G_FPTOSI %2
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$vgpr0 = COPY %3
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...
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---
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name: fptosi_s16_to_s1_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: fptosi_s16_to_s1_vv
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %4, implicit $mode, implicit $exec
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; GCN-NEXT: S_ENDPGM 0, implicit %2
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; VI-LABEL: name: fptosi_s16_to_s1_vv
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; VI: liveins: $vgpr0
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; VI-NEXT: {{ $}}
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; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; VI-NEXT: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; VI-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %4, implicit $mode, implicit $exec
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; VI-NEXT: S_ENDPGM 0, implicit %2
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; GFX11-LABEL: name: fptosi_s16_to_s1_vv
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; GFX11: liveins: $vgpr0
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX11-NEXT: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
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; GFX11-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %4, implicit $mode, implicit $exec
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; GFX11-NEXT: S_ENDPGM 0, implicit %2
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s16) = G_TRUNC %0
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%2:vgpr(s32) = G_FPTOSI %1
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%3:vgpr(s1) = G_TRUNC %2
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S_ENDPGM 0, implicit %3
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...
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---
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name: fptosi_s16_to_s1_vs
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legalized: true
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||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $sgpr0
|
||
|
|
|
||
|
|
; GCN-LABEL: name: fptosi_s16_to_s1_vs
|
||
|
|
; GCN: liveins: $sgpr0
|
||
|
|
; GCN-NEXT: {{ $}}
|
||
|
|
; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||
|
|
; GCN-NEXT: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
|
||
|
|
; GCN-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %4, implicit $mode, implicit $exec
|
||
|
|
; GCN-NEXT: S_ENDPGM 0, implicit %2
|
||
|
|
; VI-LABEL: name: fptosi_s16_to_s1_vs
|
||
|
|
; VI: liveins: $sgpr0
|
||
|
|
; VI-NEXT: {{ $}}
|
||
|
|
; VI-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||
|
|
; VI-NEXT: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
|
||
|
|
; VI-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %4, implicit $mode, implicit $exec
|
||
|
|
; VI-NEXT: S_ENDPGM 0, implicit %2
|
||
|
|
; GFX11-LABEL: name: fptosi_s16_to_s1_vs
|
||
|
|
; GFX11: liveins: $sgpr0
|
||
|
|
; GFX11-NEXT: {{ $}}
|
||
|
|
; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
||
|
|
; GFX11-NEXT: %4:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
|
||
|
|
; GFX11-NEXT: %2:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %4, implicit $mode, implicit $exec
|
||
|
|
; GFX11-NEXT: S_ENDPGM 0, implicit %2
|
||
|
|
%0:sgpr(s32) = COPY $sgpr0
|
||
|
|
%1:sgpr(s16) = G_TRUNC %0
|
||
|
|
%2:vgpr(s32) = G_FPTOSI %1
|
||
|
|
%3:vgpr(s1) = G_TRUNC %2
|
||
|
|
S_ENDPGM 0, implicit %3
|
||
|
|
...
|
||
|
|
|
||
|
|
---
|
||
|
|
name: fptosi_s16_to_s1_fneg_vv
|
||
|
|
legalized: true
|
||
|
|
regBankSelected: true
|
||
|
|
tracksRegLiveness: true
|
||
|
|
|
||
|
|
body: |
|
||
|
|
bb.0:
|
||
|
|
liveins: $vgpr0
|
||
|
|
|
||
|
|
; GCN-LABEL: name: fptosi_s16_to_s1_fneg_vv
|
||
|
|
; GCN: liveins: $vgpr0
|
||
|
|
; GCN-NEXT: {{ $}}
|
||
|
|
; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||
|
|
; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
|
||
|
|
; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec
|
||
|
|
; GCN-NEXT: %5:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec
|
||
|
|
; GCN-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %5, implicit $mode, implicit $exec
|
||
|
|
; GCN-NEXT: S_ENDPGM 0, implicit %3
|
||
|
|
; VI-LABEL: name: fptosi_s16_to_s1_fneg_vv
|
||
|
|
; VI: liveins: $vgpr0
|
||
|
|
; VI-NEXT: {{ $}}
|
||
|
|
; VI-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||
|
|
; VI-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
|
||
|
|
; VI-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec
|
||
|
|
; VI-NEXT: %5:vgpr_32 = nofpexcept V_CVT_F32_F16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec
|
||
|
|
; VI-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %5, implicit $mode, implicit $exec
|
||
|
|
; VI-NEXT: S_ENDPGM 0, implicit %3
|
||
|
|
; GFX11-LABEL: name: fptosi_s16_to_s1_fneg_vv
|
||
|
|
; GFX11: liveins: $vgpr0
|
||
|
|
; GFX11-NEXT: {{ $}}
|
||
|
|
; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||
|
|
; GFX11-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768
|
||
|
|
; GFX11-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[S_MOV_B32_]], [[COPY]], implicit $exec
|
||
|
|
; GFX11-NEXT: %5:vgpr_32 = nofpexcept V_CVT_F32_F16_t16_e64 0, [[V_XOR_B32_e64_]], 0, 0, implicit $mode, implicit $exec
|
||
|
|
; GFX11-NEXT: %3:vgpr_32 = nofpexcept V_CVT_I32_F32_e32 %5, implicit $mode, implicit $exec
|
||
|
|
; GFX11-NEXT: S_ENDPGM 0, implicit %3
|
||
|
|
%0:vgpr(s32) = COPY $vgpr0
|
||
|
|
%1:vgpr(s16) = G_TRUNC %0
|
||
|
|
%2:vgpr(s16) = G_FNEG %1
|
||
|
|
%3:vgpr(s32) = G_FPTOSI %2
|
||
|
|
%4:vgpr(s1) = G_TRUNC %3
|
||
|
|
S_ENDPGM 0, implicit %4
|
||
|
|
...
|