28 lines
1.1 KiB
ArmAsm
28 lines
1.1 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1,+sme-lutv2 2>&1 < %s | FileCheck %s
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// --------------------------------------------------------------------------//
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// Invalid vector select register
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luti4 {z0-z3}, zt0, {z0.b-z1.b}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: luti4 {z0-z3}, zt0, {z0.b-z1.b}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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luti4 {z0.d, z4.d, z8.d, z12.d}, zt0, {z0-z1}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: luti4 {z0.d, z4.d, z8.d, z12.d}, zt0, {z0-z1}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid vector grouping
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luti4 {z0.b-z1.b}, zt0, {z0-z4}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
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// CHECK-NEXT: luti4 {z0.b-z1.b}, zt0, {z0-z4}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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luti4 {z0.b - z12.b}, zt0, {z0-z1}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
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// CHECK-NEXT: luti4 {z0.b - z12.b}, zt0, {z0-z1}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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