77 lines
3.8 KiB
LLVM
77 lines
3.8 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -codegen-opt-level=1 -S -mtriple=aarch64-- -atomic-expand %s | FileCheck %s
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; RUN: opt -codegen-opt-level=1 -S -mtriple=aarch64-- -mattr=+outline-atomics -atomic-expand %s | FileCheck %s --check-prefix=OUTLINE-ATOMICS
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define void @atomic_swap_f16(ptr %ptr, half %val) nounwind {
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; CHECK-LABEL: @atomic_swap_f16(
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast half [[VAL:%.*]] to i16
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i16) [[PTR:%.*]])
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; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i16
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; CHECK-NEXT: [[TMP5:%.*]] = zext i16 [[TMP2]] to i64
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; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP5]], ptr elementtype(i16) [[PTR]])
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; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP6]], 0
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; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP4]] to half
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; CHECK-NEXT: ret void
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;
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; OUTLINE-ATOMICS-LABEL: @atomic_swap_f16(
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; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = bitcast half [[VAL:%.*]] to i16
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; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i16 [[TMP2]] acquire, align 2
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; OUTLINE-ATOMICS-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP3]] to half
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; OUTLINE-ATOMICS-NEXT: ret void
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;
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%t1 = atomicrmw xchg ptr %ptr, half %val acquire
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ret void
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}
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define void @atomic_swap_f32(ptr %ptr, float %val) nounwind {
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; CHECK-LABEL: @atomic_swap_f32(
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast float [[VAL:%.*]] to i32
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i32) [[PTR:%.*]])
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; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32
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; CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP2]] to i64
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; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP5]], ptr elementtype(i32) [[PTR]])
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; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP6]], 0
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; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP4]] to float
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; CHECK-NEXT: ret void
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;
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; OUTLINE-ATOMICS-LABEL: @atomic_swap_f32(
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; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = bitcast float [[VAL:%.*]] to i32
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; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i32 [[TMP2]] acquire, align 4
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; OUTLINE-ATOMICS-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP3]] to float
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; OUTLINE-ATOMICS-NEXT: ret void
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;
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%t1 = atomicrmw xchg ptr %ptr, float %val acquire
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ret void
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}
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define void @atomic_swap_f64(ptr %ptr, double %val) nounwind {
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; CHECK-LABEL: @atomic_swap_f64(
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast double [[VAL:%.*]] to i64
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; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
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; CHECK: atomicrmw.start:
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; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i64) [[PTR:%.*]])
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; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP2]], ptr elementtype(i64) [[PTR]])
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; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP4]], 0
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; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
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; CHECK: atomicrmw.end:
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; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP3]] to double
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; CHECK-NEXT: ret void
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;
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; OUTLINE-ATOMICS-LABEL: @atomic_swap_f64(
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; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = bitcast double [[VAL:%.*]] to i64
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; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i64 [[TMP2]] acquire, align 8
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; OUTLINE-ATOMICS-NEXT: [[TMP4:%.*]] = bitcast i64 [[TMP3]] to double
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; OUTLINE-ATOMICS-NEXT: ret void
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;
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%t1 = atomicrmw xchg ptr %ptr, double %val acquire
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ret void
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}
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