92 lines
3.1 KiB
Text
92 lines
3.1 KiB
Text
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv32 -mattr=+v -riscv-enable-subreg-liveness -run-pass riscv-init-undef -run-pass machineverifier %s -o - | FileCheck %s
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--- |
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source_filename = "<stdin>"
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target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
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target triple = "riscv64"
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define <vscale x 2 x float> @undef_early_clobber_chain(ptr %p) #0 {
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entry:
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%0 = tail call <vscale x 2 x float> @llvm.riscv.vrgather.vx.nxv2f32.i64(<vscale x 2 x float> undef, <vscale x 2 x float> undef, i64 0, i64 0)
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ret <vscale x 2 x float> %0
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}
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declare <vscale x 2 x float> @llvm.riscv.vrgather.vx.nxv2f32.i64(<vscale x 2 x float>, <vscale x 2 x float>, i64, i64) #1
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attributes #0 = { "target-features"="+v" }
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attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) "target-features"="+v" }
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...
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---
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name: undef_early_clobber_chain
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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failedISel: false
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tracksRegLiveness: true
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hasWinCFI: false
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callsEHReturn: false
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callsUnwindInit: false
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hasEHCatchret: false
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hasEHScopes: false
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hasEHFunclets: false
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isOutlined: false
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debugInstrRef: false
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failsVerification: false
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tracksDebugUserValues: false
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registers:
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- { id: 0, class: gpr, preferred-register: '' }
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- { id: 1, class: vr, preferred-register: '' }
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- { id: 2, class: vr, preferred-register: '' }
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- { id: 3, class: vr, preferred-register: '' }
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liveins: []
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 1
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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functionContext: ''
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maxCallFrameSize: 4294967295
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cvBytesOfCalleeSavedRegisters: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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hasTailCall: false
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localFrameSize: 0
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savePoint: ''
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restorePoint: ''
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fixedStack: []
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stack: []
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entry_values: []
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callSites: []
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debugValueSubstitutions: []
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constants: []
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machineFunctionInfo:
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varArgsFrameIndex: 0
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varArgsSaveSize: 0
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body: |
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bb.0.entry:
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; CHECK-LABEL: name: undef_early_clobber_chain
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; CHECK: [[DEF:%[0-9]+]]:vr = IMPLICIT_DEF
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; CHECK-NEXT: dead $x0 = PseudoVSETIVLI 0, 208 /* e32, m1, ta, ma */, implicit-def $vl, implicit-def $vtype
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; CHECK-NEXT: [[PseudoRVVInitUndefM1_:%[0-9]+]]:vr = PseudoRVVInitUndefM1
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; CHECK-NEXT: early-clobber %1:vr = PseudoVRGATHER_VI_M1 undef [[DEF]], [[PseudoRVVInitUndefM1_]], 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
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; CHECK-NEXT: $v8 = COPY %1
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; CHECK-NEXT: PseudoRET implicit $v8
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%2:vr = IMPLICIT_DEF
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dead $x0 = PseudoVSETIVLI 0, 208 /* e32, m1, ta, ma */, implicit-def $vl, implicit-def $vtype
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early-clobber %1:vr = PseudoVRGATHER_VI_M1 undef %2, undef %2, 0, 0, 5 /* e32 */, 0 /* tu, mu */, implicit $vl, implicit $vtype
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$v8 = COPY %1
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PseudoRET implicit $v8
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...
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