198 lines
7.1 KiB
ArmAsm
198 lines
7.1 KiB
ArmAsm
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# REQUIRES: riscv
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# RUN: rm -rf %t && split-file %s %t && cd %t
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# RUN: llvm-mc -filetype=obj -triple=riscv64 --defsym PAD=0 -mattr=+c,+relax a.s -o a.64.o
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# RUN: llvm-mc -filetype=obj -triple=riscv64 --defsym PAD=5000 -mattr=+c,+relax a.s -o aa.64.o
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# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+c,+relax c.s -o c.64.o
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# RUN: ld.lld -shared -soname=c.64.so c.64.o -o c.64.so
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# RUN: ld.lld -shared -z now a.64.o c.64.o -o a.64.so -z separate-code
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# RUN: llvm-objdump --no-show-raw-insn -M no-aliases -h -d a.64.so | FileCheck %s --check-prefix=GD64
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## Test the TLSDESC to LE optimization. Also check --emit-relocs.
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# RUN: ld.lld -e 0 -z now a.64.o c.64.o -o a.64.le -z separate-code --emit-relocs
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# RUN: llvm-objdump --no-show-raw-insn -M no-aliases -hdr a.64.le | FileCheck %s --check-prefix=LE64
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# RUN: ld.lld -e 0 -z now aa.64.o c.64.o -o aa.64.le -z separate-code
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# RUN: llvm-objdump --no-show-raw-insn -M no-aliases -h -d aa.64.le | FileCheck %s --check-prefix=LE64A
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## Test the TLSDESC to IE optimization.
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# RUN: ld.lld -e 0 -z now a.64.o c.64.so -o a.64.ie -z separate-code
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# RUN: llvm-objdump --no-show-raw-insn -M no-aliases -h -d a.64.ie | FileCheck %s --check-prefix=IE64
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# GD64: .got 00000018 00000000000020c0
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# GD64-LABEL: <_start>:
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# GD64-NEXT: jal {{.*}} <foo>
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# GD64-LABEL: <foo>:
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## &.got[c]-. = 0x20c0+8 - 0x1004 = 0x10c4
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# GD64: 1004: auipc a2, 0x1
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# GD64-NEXT: c.add a7, a7
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# GD64-NEXT: ld a3, 0xc4(a2)
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# GD64-NEXT: c.add a7, a7
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# GD64-NEXT: addi a0, a2, 0xc4
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# GD64-NEXT: c.add a7, a7
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# GD64-NEXT: jalr t0, 0x0(a3)
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# GD64-NEXT: c.add a0, tp
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# GD64-NEXT: jal {{.*}} <foo>
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## &.got[c]-. = 0x20c0+8 - 0x1020 = 0x10a8
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# GD64-LABEL: <.Ltlsdesc_hi1>:
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# GD64-NEXT: 1020: auipc a4, 0x1
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# GD64-NEXT: ld a5, 0xa8(a4)
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# GD64-NEXT: addi a0, a4, 0xa8
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# GD64-NEXT: jalr t0, 0x0(a5)
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# GD64-NEXT: c.add a0, tp
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## &.got[c]-. = 0x20c0+8 - 0x1032 = 0x1096
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# GD64-LABEL: <.Ltlsdesc_hi2>:
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# GD64-NEXT: 1032: auipc a6, 0x1
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# GD64-NEXT: ld a7, 0x96(a6)
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# GD64-NEXT: addi a0, a6, 0x96
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# GD64-NEXT: jalr t0, 0x0(a7)
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# GD64-NEXT: c.add a0, tp
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# LE64-LABEL: <_start>:
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# LE64-NEXT: jal {{.*}} <foo>
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# LE64-LABEL: <foo>:
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# LE64-NEXT: c.add a7, a7
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# LE64-NEXT: R_RISCV_TLSDESC_HI20 b
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# LE64-NEXT: R_RISCV_RELAX *ABS*
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# LE64-NEXT: c.add a7, a7
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# LE64-NEXT: R_RISCV_TLSDESC_LOAD_LO12 .Ltlsdesc_hi0
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# LE64-NEXT: R_RISCV_RELAX *ABS*
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# LE64-NEXT: 11008: c.add a7, a7
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# LE64-NEXT: R_RISCV_TLSDESC_ADD_LO12 .Ltlsdesc_hi0
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# LE64-NEXT: R_RISCV_RELAX *ABS*
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# LE64-NEXT: addi a0, zero, 0x7ff
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# LE64-NEXT: R_RISCV_TLSDESC_CALL .Ltlsdesc_hi0
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# LE64-NEXT: R_RISCV_RELAX *ABS*
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# LE64-NEXT: c.add a0, tp
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# LE64-NEXT: jal {{.*}} <foo>
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# LE64-NEXT: R_RISCV_JAL foo
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# LE64-NEXT: R_RISCV_RELAX *ABS*
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# LE64-LABEL: <.Ltlsdesc_hi1>:
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# LE64-NEXT: addi a0, zero, 0x7ff
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# LE64-NEXT: R_RISCV_TLSDESC_HI20 b
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# LE64-NEXT: R_RISCV_RELAX *ABS*
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# LE64-NEXT: R_RISCV_TLSDESC_LOAD_LO12 .Ltlsdesc_hi1
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# LE64-NEXT: R_RISCV_TLSDESC_ADD_LO12 .Ltlsdesc_hi1
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# LE64-NEXT: R_RISCV_TLSDESC_CALL .Ltlsdesc_hi1
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# LE64-NEXT: c.add a0, tp
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# LE64-LABEL: <.Ltlsdesc_hi2>:
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# LE64-NEXT: addi zero, zero, 0x0
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# LE64-NEXT: R_RISCV_TLSDESC_HI20 b
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# LE64-NEXT: addi zero, zero, 0x0
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# LE64-NEXT: R_RISCV_TLSDESC_LOAD_LO12 .Ltlsdesc_hi2
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# LE64-NEXT: R_RISCV_RELAX *ABS*
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# LE64-NEXT: addi zero, zero, 0x0
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# LE64-NEXT: R_RISCV_TLSDESC_ADD_LO12 .Ltlsdesc_hi2
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# LE64-NEXT: R_RISCV_RELAX *ABS*
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# LE64-NEXT: addi a0, zero, 0x7ff
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# LE64-NEXT: R_RISCV_TLSDESC_CALL .Ltlsdesc_hi2
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# LE64-NEXT: c.add a0, tp
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# LE64A-LABEL: <_start>:
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# LE64A-NEXT: jal {{.*}} <foo>
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# LE64A-LABEL: <foo>:
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# LE64A-NEXT: c.add a7, a7
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# LE64A-NEXT: c.add a7, a7
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# LE64A-NEXT: 11008: lui a0, 0x2
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# LE64A-NEXT: c.add a7, a7
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# LE64A-NEXT: addi a0, a0, -0x479
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# LE64A-NEXT: c.add a0, tp
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# LE64A-NEXT: jal {{.*}} <foo>
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# LE64A-LABEL: <.Ltlsdesc_hi1>:
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# LE64A-NEXT: lui a0, 0x2
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# LE64A-NEXT: addi a0, a0, -0x479
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# LE64A-NEXT: c.add a0, tp
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# LE64A-LABEL: <.Ltlsdesc_hi2>:
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# LE64A-NEXT: addi zero, zero, 0x0
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# LE64A-NEXT: addi zero, zero, 0x0
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# LE64A-NEXT: lui a0, 0x2
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# LE64A-NEXT: addi a0, a0, -0x479
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# LE64A-NEXT: c.add a0, tp
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# IE64: .got 00000010 00000000000120e0
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# IE64-LABEL: <_start>:
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# IE64-NEXT: jal {{.*}} <foo>
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# IE64-LABEL: <foo>:
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# IE64-NEXT: c.add a7, a7
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# IE64-NEXT: c.add a7, a7
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## &.got[c]-. = 0x120e0+8 - 0x11008 = 0x10e0
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# IE64-NEXT: 11008: auipc a0, 0x1
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# IE64-NEXT: c.add a7, a7
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# IE64-NEXT: ld a0, 0xe0(a0)
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# IE64-NEXT: c.add a0, tp
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# IE64-NEXT: jal {{.*}} <foo>
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## &.got[c]-. = 0x120e0+8 - 0x11018 = 0x10d0
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# IE64-LABEL: <.Ltlsdesc_hi1>:
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# IE64-NEXT: 11018: auipc a0, 0x1
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# IE64-NEXT: ld a0, 0xd0(a0)
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# IE64-NEXT: c.add a0, tp
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## &.got[c]-. = 0x120e0+8 - 0x1102a = 0x10be
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# IE64-LABEL: <.Ltlsdesc_hi2>:
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# IE64-NEXT: addi zero, zero, 0x0
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# IE64-NEXT: addi zero, zero, 0x0
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# IE64-NEXT: 1102a: auipc a0, 0x1
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# IE64-NEXT: ld a0, 0xbe(a0)
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# IE64-NEXT: c.add a0, tp
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#--- a.s
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.globl _start
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_start:
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.balign 16
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call foo
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foo:
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.Ltlsdesc_hi0:
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.option norelax
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## All 4 instructions have an R_RISCV_RELAX.
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## Check that optimization/relaxation are not affected by irrelevant instructions.
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auipc a2, %tlsdesc_hi(b)
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.reloc .-4, R_RISCV_RELAX, 0
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c.add a7, a7
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ld a3, %tlsdesc_load_lo(.Ltlsdesc_hi0)(a2)
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.reloc .-4, R_RISCV_RELAX, 0
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c.add a7, a7
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addi a0, a2, %tlsdesc_add_lo(.Ltlsdesc_hi0)
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.reloc .-4, R_RISCV_RELAX, 0
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c.add a7, a7
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jalr t0, 0(a3), %tlsdesc_call(.Ltlsdesc_hi0)
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.reloc .-4, R_RISCV_RELAX, 0
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add a0, a0, tp
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.option relax
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call foo
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.Ltlsdesc_hi1:
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.option norelax
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## AUIPC has an R_RISCV_RELAX. We perform relaxation, ignoring whether other
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## instructions have R_RISCV_RELAX.
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auipc a4, %tlsdesc_hi(b)
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.reloc .-4, R_RISCV_RELAX, 0
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ld a5, %tlsdesc_load_lo(.Ltlsdesc_hi1)(a4)
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addi a0, a4, %tlsdesc_add_lo(.Ltlsdesc_hi1)
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jalr t0, 0(a5), %tlsdesc_call(.Ltlsdesc_hi1)
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add a0, a0, tp
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.option relax
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.Ltlsdesc_hi2:
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.option norelax
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## AUIPC does not have R_RISCV_RELAX. No relaxation.
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auipc a6, %tlsdesc_hi(b)
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ld a7, %tlsdesc_load_lo(.Ltlsdesc_hi2)(a6)
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.reloc .-4, R_RISCV_RELAX, 0
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addi a0, a6, %tlsdesc_add_lo(.Ltlsdesc_hi2)
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.reloc .-4, R_RISCV_RELAX, 0
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jalr t0, 0(a7), %tlsdesc_call(.Ltlsdesc_hi2)
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add a0, a0, tp
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.option relax
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.section .tbss
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.globl a
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.zero 8
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a:
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.zero 2039+PAD ## Place b at 0x7ff+PAD
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#--- c.s
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.tbss
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.globl b
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b:
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.zero 4
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