231 lines
7.4 KiB
Text
231 lines
7.4 KiB
Text
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner --aarch64prelegalizercombiner-only-enable-rule="icmp_to_lhs_known_bits" -global-isel -verify-machineinstrs %s -o - | FileCheck %s
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# REQUIRES: asserts
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...
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---
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name: apply_ne
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: apply_ne
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; CHECK: liveins: $w0
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; CHECK: %x:_(s32) = COPY $w0
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; CHECK: %one:_(s32) = G_CONSTANT i32 1
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; CHECK: %known_zero_or_one:_(s32) = G_AND %x, %one
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; CHECK: %cmp:_(s1) = G_TRUNC %known_zero_or_one(s32)
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; CHECK: %ext:_(s32) = G_ZEXT %cmp(s1)
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; CHECK: $w0 = COPY %ext(s32)
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; CHECK: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%one:_(s32) = G_CONSTANT i32 1
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%known_zero_or_one:_(s32) = G_AND %x, %one
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%zero:_(s32) = G_CONSTANT i32 0
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%cmp:_(s1) = G_ICMP intpred(ne), %known_zero_or_one(s32), %zero
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%ext:_(s32) = G_ZEXT %cmp(s1)
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$w0 = COPY %ext(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: apply_eq
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: apply_eq
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; CHECK: liveins: $w0
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; CHECK: %x:_(s32) = COPY $w0
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; CHECK: %one:_(s32) = G_CONSTANT i32 1
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; CHECK: %known_zero_or_one:_(s32) = G_AND %x, %one
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; CHECK: %cmp:_(s1) = G_TRUNC %known_zero_or_one(s32)
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; CHECK: %ext:_(s32) = G_ZEXT %cmp(s1)
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; CHECK: $w0 = COPY %ext(s32)
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; CHECK: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%one:_(s32) = G_CONSTANT i32 1
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%known_zero_or_one:_(s32) = G_AND %x, %one
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%cmp:_(s1) = G_ICMP intpred(eq), %known_zero_or_one(s32), %one
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%ext:_(s32) = G_ZEXT %cmp(s1)
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$w0 = COPY %ext(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: dont_apply_wrong_cst_eq
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $w0
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; Wrong constant on the RHS of the compare.
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; CHECK-LABEL: name: dont_apply_wrong_cst_eq
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; CHECK: liveins: $w0
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; CHECK: %x:_(s32) = COPY $w0
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; CHECK: %one:_(s32) = G_CONSTANT i32 1
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; CHECK: %known_zero_or_one:_(s32) = G_AND %x, %one
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; CHECK: %wrong_cst:_(s32) = G_CONSTANT i32 10
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; CHECK: %cmp:_(s1) = G_ICMP intpred(eq), %known_zero_or_one(s32), %wrong_cst
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; CHECK: %ext:_(s32) = G_ZEXT %cmp(s1)
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; CHECK: $w0 = COPY %ext(s32)
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; CHECK: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%one:_(s32) = G_CONSTANT i32 1
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%known_zero_or_one:_(s32) = G_AND %x, %one
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%wrong_cst:_(s32) = G_CONSTANT i32 10
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%cmp:_(s1) = G_ICMP intpred(eq), %known_zero_or_one(s32), %wrong_cst
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%ext:_(s32) = G_ZEXT %cmp(s1)
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$w0 = COPY %ext(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: dont_apply_wrong_cst_ne
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $w0
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; Wrong constant on the RHS of the compare.
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; CHECK-LABEL: name: dont_apply_wrong_cst_ne
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; CHECK: liveins: $w0
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; CHECK: %x:_(s32) = COPY $w0
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; CHECK: %one:_(s32) = G_CONSTANT i32 1
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; CHECK: %known_zero_or_one:_(s32) = G_AND %x, %one
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; CHECK: %wrong_cst:_(s32) = G_CONSTANT i32 10
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; CHECK: %cmp:_(s1) = G_ICMP intpred(ne), %known_zero_or_one(s32), %wrong_cst
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; CHECK: %ext:_(s32) = G_ZEXT %cmp(s1)
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; CHECK: $w0 = COPY %ext(s32)
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; CHECK: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%one:_(s32) = G_CONSTANT i32 1
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%known_zero_or_one:_(s32) = G_AND %x, %one
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%wrong_cst:_(s32) = G_CONSTANT i32 10
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%cmp:_(s1) = G_ICMP intpred(ne), %known_zero_or_one(s32), %wrong_cst
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%ext:_(s32) = G_ZEXT %cmp(s1)
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$w0 = COPY %ext(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: dont_apply_vector
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $x0
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; True is -1 for vectors on AArch64 so we don't want to combine.
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; CHECK-LABEL: name: dont_apply_vector
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; CHECK: liveins: $x0
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; CHECK: %x:_(<2 x s32>) = COPY $x0
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; CHECK: %one:_(s32) = G_CONSTANT i32 1
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; CHECK: %one_vec:_(<2 x s32>) = G_BUILD_VECTOR %one(s32), %one(s32)
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; CHECK: %vec_and:_(<2 x s32>) = G_AND %x, %one_vec
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; CHECK: %zero:_(s32) = G_CONSTANT i32 0
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; CHECK: %zero_vec:_(<2 x s32>) = G_BUILD_VECTOR %zero(s32), %zero(s32)
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; CHECK: %cmp:_(<2 x s1>) = G_ICMP intpred(ne), %vec_and(<2 x s32>), %zero_vec
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; CHECK: %elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp(<2 x s1>), %zero(s32)
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; CHECK: %ext:_(s32) = G_ZEXT %elt(s1)
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; CHECK: $w0 = COPY %ext(s32)
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; CHECK: RET_ReallyLR implicit $w0
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%x:_(<2 x s32>) = COPY $x0
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%one:_(s32) = G_CONSTANT i32 1
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%one_vec:_(<2 x s32>) = G_BUILD_VECTOR %one, %one
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%vec_and:_(<2 x s32>) = G_AND %x, %one_vec
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%zero:_(s32) = G_CONSTANT i32 0
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%zero_vec:_(<2 x s32>) = G_BUILD_VECTOR %zero, %zero
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%cmp:_(<2 x s1>) = G_ICMP intpred(ne), %vec_and(<2 x s32>), %zero_vec
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%elt:_(s1) = G_EXTRACT_VECTOR_ELT %cmp, %zero
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%ext:_(s32) = G_ZEXT %elt(s1)
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$w0 = COPY %ext(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: apply_no_zext_or_trunc
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: apply_no_zext_or_trunc
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; CHECK: liveins: $w0
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; CHECK: %x:_(s32) = COPY $w0
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; CHECK: %one:_(s32) = G_CONSTANT i32 1
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; CHECK: %known_zero_or_one:_(s32) = G_AND %x, %one
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; CHECK: %cmp:_(s32) = COPY %known_zero_or_one(s32)
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; CHECK: $w0 = COPY %cmp(s32)
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; CHECK: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%one:_(s32) = G_CONSTANT i32 1
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%known_zero_or_one:_(s32) = G_AND %x, %one
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%zero:_(s32) = G_CONSTANT i32 0
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%cmp:_(s32) = G_ICMP intpred(ne), %known_zero_or_one(s32), %zero
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$w0 = COPY %cmp(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: apply_wide_cmp
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: apply_wide_cmp
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; CHECK: liveins: $w0
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; CHECK: %x:_(s64) = COPY $x0
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; CHECK: %one:_(s64) = G_CONSTANT i64 1
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; CHECK: %known_zero_or_one:_(s64) = G_AND %x, %one
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; CHECK: %cmp:_(s64) = COPY %known_zero_or_one(s64)
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; CHECK: %trunc:_(s32) = G_TRUNC %cmp(s64)
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; CHECK: $w0 = COPY %trunc(s32)
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; CHECK: RET_ReallyLR implicit $w0
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%x:_(s64) = COPY $x0
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%one:_(s64) = G_CONSTANT i64 1
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%known_zero_or_one:_(s64) = G_AND %x, %one
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%zero:_(s64) = G_CONSTANT i64 0
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%cmp:_(s64) = G_ICMP intpred(ne), %known_zero_or_one(s64), %zero
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%trunc:_(s32) = G_TRUNC %cmp
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$w0 = COPY %trunc(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: apply_narrow_lhs
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alignment: 4
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tracksRegLiveness: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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liveins: $w0
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; CHECK-LABEL: name: apply_narrow_lhs
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; CHECK: liveins: $w0
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; CHECK: %x:_(s32) = COPY $w0
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; CHECK: %one:_(s32) = G_CONSTANT i32 1
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; CHECK: %known_zero_or_one:_(s32) = G_AND %x, %one
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; CHECK: %cmp:_(s64) = G_ZEXT %known_zero_or_one(s32)
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; CHECK: $x0 = COPY %cmp(s64)
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; CHECK: RET_ReallyLR implicit $x0
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%x:_(s32) = COPY $w0
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%one:_(s32) = G_CONSTANT i32 1
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%known_zero_or_one:_(s32) = G_AND %x, %one
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%zero:_(s32) = G_CONSTANT i32 0
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%cmp:_(s64) = G_ICMP intpred(ne), %known_zero_or_one(s32), %zero
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$x0 = COPY %cmp(s64)
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RET_ReallyLR implicit $x0
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