72 lines
2.9 KiB
LLVM
72 lines
2.9 KiB
LLVM
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; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -mcpu=cyclone | FileCheck %s
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define <8 x i1> @test1() {
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; CHECK-LABEL: test1:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: movi.16b v0, #0
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; CHECK-NEXT: ret
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entry:
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%Shuff = shufflevector <8 x i1> <i1 0, i1 1, i1 2, i1 3, i1 4, i1 5, i1 6,
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i1 7>,
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<8 x i1> <i1 0, i1 1, i1 2, i1 3, i1 4, i1 5, i1 6,
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i1 7>,
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<8 x i32> <i32 2, i32 undef, i32 6, i32 undef, i32 10,
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i32 12, i32 14, i32 0>
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ret <8 x i1> %Shuff
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}
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define <8 x i1>@test2() {
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; CHECK-LABEL: test2:
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; CHECK: ; %bb.0: ; %bb
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; CHECK-NEXT: movi d0, #0x0000ff00000000
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; CHECK-NEXT: ret
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bb:
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%Shuff = shufflevector <8 x i1> zeroinitializer,
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<8 x i1> <i1 0, i1 1, i1 1, i1 0, i1 0, i1 1, i1 0, i1 0>,
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<8 x i32> <i32 2, i32 undef, i32 6, i32 undef, i32 10, i32 12, i32 14,
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i32 0>
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ret <8 x i1> %Shuff
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}
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define <16 x i1> @test3(ptr %ptr, i32 %v) {
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; CHECK-LABEL: test3:
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; CHECK: ; %bb.0: ; %bb
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; CHECK-NEXT: movi.2d v0, #0x0000ff000000ff
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; CHECK-NEXT: ret
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bb:
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%Shuff = shufflevector <16 x i1> <i1 0, i1 1, i1 1, i1 0, i1 0, i1 1, i1 0, i1 0, i1 0, i1 1, i1 1, i1 0, i1 0, i1 1, i1 0, i1 0>, <16 x i1> undef,
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<16 x i32> <i32 2, i32 undef, i32 6, i32 undef, i32 10, i32 12, i32 14,
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i32 0, i32 2, i32 undef, i32 6, i32 undef, i32 10, i32 12,
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i32 14, i32 0>
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ret <16 x i1> %Shuff
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}
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; CHECK-LABEL: lCPI3_0:
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 255 ; 0xff
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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; CHECK: .byte 0 ; 0x0
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define <16 x i1> @test4(ptr %ptr, i32 %v) {
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; CHECK-LABEL: _test4:
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; CHECK: adrp x[[REG3:[0-9]+]], lCPI3_0@PAGE
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; CHECK: ldr q[[REG2:[0-9]+]], [x[[REG3]], lCPI3_0@PAGEOFF]
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bb:
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%Shuff = shufflevector <16 x i1> zeroinitializer,
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<16 x i1> <i1 0, i1 1, i1 1, i1 0, i1 0, i1 1, i1 0, i1 0, i1 0, i1 1,
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i1 1, i1 0, i1 0, i1 1, i1 0, i1 0>,
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<16 x i32> <i32 2, i32 1, i32 6, i32 18, i32 10, i32 12, i32 14, i32 0,
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i32 2, i32 31, i32 6, i32 30, i32 10, i32 12, i32 14, i32 0>
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ret <16 x i1> %Shuff
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}
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