434 lines
13 KiB
LLVM
434 lines
13 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt %s -callbrprepare -S -o - | FileCheck %s
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; RUN: opt %s -passes=callbrprepare -S -o - | FileCheck %s
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define i32 @test0() {
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; CHECK-LABEL: @test0(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[OUT:%.*]] = callbr i32 asm "# $0", "=r,!i"()
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; CHECK-NEXT: to label [[DIRECT:%.*]] [label %entry.indirect_crit_edge]
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; CHECK: entry.indirect_crit_edge:
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; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[OUT]])
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; CHECK-NEXT: br label [[INDIRECT:%.*]]
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; CHECK: direct:
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; CHECK-NEXT: [[OUT2:%.*]] = callbr i32 asm "# $0", "=r,!i"()
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; CHECK-NEXT: to label [[DIRECT2:%.*]] [label %direct.indirect_crit_edge]
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; CHECK: direct.indirect_crit_edge:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[OUT2]])
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; CHECK-NEXT: br label [[INDIRECT]]
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; CHECK: direct2:
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; CHECK-NEXT: ret i32 0
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; CHECK: indirect:
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; CHECK-NEXT: [[OUT3:%.*]] = phi i32 [ [[TMP0]], [[ENTRY_INDIRECT_CRIT_EDGE:%.*]] ], [ [[TMP1]], [[DIRECT_INDIRECT_CRIT_EDGE:%.*]] ]
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; CHECK-NEXT: ret i32 [[OUT3]]
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;
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entry:
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%out = callbr i32 asm "# $0", "=r,!i"()
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to label %direct [label %indirect]
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direct:
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%out2 = callbr i32 asm "# $0", "=r,!i"()
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to label %direct2 [label %indirect]
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direct2:
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ret i32 0
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indirect:
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%out3 = phi i32 [%out, %entry], [%out2, %direct]
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ret i32 %out3
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}
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; Don't split edges unless they are critical, and callbr produces output, and
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; that output is used.
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; Here we have none of the above.
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define i32 @dont_split0() {
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; CHECK-LABEL: @dont_split0(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: callbr void asm "", "!i"()
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; CHECK-NEXT: to label [[X:%.*]] [label %y]
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; CHECK: x:
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; CHECK-NEXT: ret i32 42
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; CHECK: y:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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callbr void asm "", "!i"()
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to label %x [label %y]
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x:
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ret i32 42
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y:
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ret i32 0
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}
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; Don't split edges unless they are critical, and callbr produces output, and
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; that output is used.
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; Here we have output, but no critical edge.
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; That said, we ought to insert a callbr landing pad intrinsic call and update
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; to use the correct SSA value.
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define i32 @dont_split1() {
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; CHECK-LABEL: @dont_split1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i"()
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; CHECK-NEXT: to label [[X:%.*]] [label %y]
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; CHECK: x:
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; CHECK-NEXT: ret i32 42
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; CHECK: y:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
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; CHECK-NEXT: ret i32 [[TMP1]]
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;
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entry:
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%0 = callbr i32 asm "", "=r,!i"()
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to label %x [label %y]
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x:
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ret i32 42
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y:
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ret i32 %0
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}
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; Don't split edges unless they are critical, and callbr produces output, and
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; that output is used.
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; Here we have a critical edge along an indirect branch, but no output.
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define i32 @dont_split2() {
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; CHECK-LABEL: @dont_split2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: callbr void asm "", "!i"()
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; CHECK-NEXT: to label [[X:%.*]] [label %y]
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; CHECK: x:
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; CHECK-NEXT: br label [[Y:%.*]]
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; CHECK: y:
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; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ 0, [[X]] ], [ 42, [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret i32 [[TMP0]]
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;
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entry:
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callbr void asm "", "!i"()
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to label %x [label %y]
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x:
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br label %y
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y:
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%0 = phi i32 [ 0, %x ], [ 42, %entry ]
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ret i32 %0
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}
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; Don't split edges unless they are critical, and callbr produces output, and
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; that output is used.
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; Here we're missing a use.
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define i32 @dont_split3() {
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; CHECK-LABEL: @dont_split3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i"()
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; CHECK-NEXT: to label [[X:%.*]] [label %v]
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; CHECK: x:
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; CHECK-NEXT: br label [[V:%.*]]
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; CHECK: v:
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; CHECK-NEXT: ret i32 42
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;
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entry:
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%0 = callbr i32 asm "", "=r,!i"() to label %x [label %v]
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x:
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br label %v
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v:
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ret i32 42
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}
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; Don't split edges unless they are critical, and callbr produces output, and
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; that output is used.
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; Here we have output and a critical edge along an indirect branch.
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define i32 @split_me0() {
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; CHECK-LABEL: @split_me0(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i"()
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; CHECK-NEXT: to label [[X:%.*]] [label %entry.y_crit_edge]
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; CHECK: entry.y_crit_edge:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
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; CHECK-NEXT: br label [[Y:%.*]]
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; CHECK: x:
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; CHECK-NEXT: br label [[Y]]
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; CHECK: y:
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; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[ENTRY_Y_CRIT_EDGE:%.*]] ], [ 42, [[X]] ]
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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entry:
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%0 = callbr i32 asm "", "=r,!i"()
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to label %x [label %y]
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x:
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br label %y
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y:
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%1 = phi i32 [ %0, %entry ], [ 42, %x ]
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ret i32 %1
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}
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; Here we have output and a critical edge along an indirect branch.
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; Ensure that if we repeat the indirect destination, that we only split it
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; once.
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define i32 @split_me1(i1 %z) {
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; CHECK-LABEL: @split_me1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[Z:%.*]], label [[W:%.*]], label [[V:%.*]]
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; CHECK: w:
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; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i,!i"()
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; CHECK-NEXT: to label [[X:%.*]] [label [[W_V_CRIT_EDGE:%.*]], label %w.v_crit_edge]
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; CHECK: w.v_crit_edge:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
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; CHECK-NEXT: br label [[V]]
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; CHECK: x:
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; CHECK-NEXT: ret i32 42
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; CHECK: v:
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; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[W_V_CRIT_EDGE]] ], [ undef, [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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entry:
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br i1 %z, label %w, label %v
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w:
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%0 = callbr i32 asm "", "=r,!i,!i"()
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to label %x [label %v, label %v]
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x:
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ret i32 42
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v:
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%1 = phi i32 [%0, %w], [%0, %w], [undef, %entry]
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ret i32 %1
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}
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; A more interessting case of @split_me1. Check that we still only split the
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; critical edge from w to v once.
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define i32 @split_me2(i1 %z) {
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; CHECK-LABEL: @split_me2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[Z:%.*]], label [[W:%.*]], label [[V:%.*]]
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; CHECK: w:
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; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i,!i"()
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; CHECK-NEXT: to label [[X:%.*]] [label [[W_V_CRIT_EDGE:%.*]], label %w.v_crit_edge]
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; CHECK: w.v_crit_edge:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
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; CHECK-NEXT: br label [[V]]
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; CHECK: x:
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; CHECK-NEXT: ret i32 42
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; CHECK: v:
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; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[W_V_CRIT_EDGE]] ], [ 42, [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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entry:
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br i1 %z, label %w, label %v
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w:
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%0 = callbr i32 asm "", "=r,!i,!i"()
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to label %x [label %v, label %v]
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x:
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ret i32 42
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v:
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%1 = phi i32 [ %0, %w ], [ 42, %entry ], [ %0, %w ]
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ret i32 %1
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}
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; Here we have a diamond with no phi.
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define i32 @dont_split4() {
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; CHECK-LABEL: @dont_split4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i"()
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; CHECK-NEXT: to label [[X:%.*]] [label %y]
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; CHECK: x:
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; CHECK-NEXT: br label [[OUT:%.*]]
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; CHECK: y:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
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; CHECK-NEXT: br label [[OUT]]
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; CHECK: out:
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; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[Y:%.*]] ], [ [[TMP0]], [[X]] ]
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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entry:
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%0 = callbr i32 asm "", "=r,!i"()
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to label %x [label %y]
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x:
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br label %out
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y:
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br label %out
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out:
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ret i32 %0
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}
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; Triangle with no phi.
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define i32 @dont_split5() {
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; CHECK-LABEL: @dont_split5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i"()
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; CHECK-NEXT: to label [[OUT:%.*]] [label %y]
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; CHECK: y:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
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; CHECK-NEXT: br label [[OUT]]
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; CHECK: out:
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; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[Y:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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entry:
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%0 = callbr i32 asm "", "=r,!i"()
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to label %out [label %y]
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y:
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br label %out
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out:
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ret i32 %0
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}
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; Triangle the other way with no phi.
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define i32 @split_me3() {
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; CHECK-LABEL: @split_me3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i"()
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; CHECK-NEXT: to label [[Y:%.*]] [label %entry.out_crit_edge]
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; CHECK: entry.out_crit_edge:
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; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
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; CHECK-NEXT: br label [[OUT:%.*]]
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; CHECK: y:
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; CHECK-NEXT: br label [[OUT]]
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; CHECK: out:
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; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[ENTRY_OUT_CRIT_EDGE:%.*]] ], [ [[TMP0]], [[Y]] ]
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; CHECK-NEXT: ret i32 [[TMP2]]
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;
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entry:
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%0 = callbr i32 asm "", "=r,!i"()
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to label %y [label %out]
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y:
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br label %out
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out:
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ret i32 %0
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}
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; Test callbr looping back on itself.
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define i32 @dont_split6(i32 %0) {
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; CHECK-LABEL: @dont_split6(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[TMP0:%.*]], [[ENTRY:%.*]] ], [ [[TMP3:%.*]], [[LOOP_LOOP_CRIT_EDGE:%.*]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = callbr i32 asm "", "=r,0,!i"(i32 [[TMP1]])
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; CHECK-NEXT: to label [[EXIT:%.*]] [label %loop.loop_crit_edge]
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; CHECK: loop.loop_crit_edge:
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; CHECK-NEXT: [[TMP3]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP2]])
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; CHECK-NEXT: br label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br label %loop
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loop:
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%1 = phi i32 [%0, %entry], [%2, %loop]
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%2 = callbr i32 asm "", "=r,0,!i"(i32 %1) to label %exit [label %loop]
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exit:
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ret i32 0
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}
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|
||
|
|
; Test same direct+indirect dest no phi.
|
||
|
|
define i32 @split_me4() {
|
||
|
|
; CHECK-LABEL: @split_me4(
|
||
|
|
; CHECK-NEXT: entry:
|
||
|
|
; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i"()
|
||
|
|
; CHECK-NEXT: to label [[SAME:%.*]] [label %entry.same_crit_edge]
|
||
|
|
; CHECK: entry.same_crit_edge:
|
||
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
|
||
|
|
; CHECK-NEXT: br label [[SAME]]
|
||
|
|
; CHECK: same:
|
||
|
|
; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[ENTRY_SAME_CRIT_EDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
|
||
|
|
; CHECK-NEXT: ret i32 [[TMP2]]
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
%0 = callbr i32 asm "", "=r,!i"() to label %same [label %same]
|
||
|
|
same:
|
||
|
|
ret i32 %0
|
||
|
|
}
|
||
|
|
|
||
|
|
; Test same direct+indirect dest w/ phi.
|
||
|
|
define i32 @split_me5() {
|
||
|
|
; CHECK-LABEL: @split_me5(
|
||
|
|
; CHECK-NEXT: entry:
|
||
|
|
; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i"()
|
||
|
|
; CHECK-NEXT: to label [[SAME:%.*]] [label %entry.same_crit_edge]
|
||
|
|
; CHECK: entry.same_crit_edge:
|
||
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
|
||
|
|
; CHECK-NEXT: br label [[SAME]]
|
||
|
|
; CHECK: same:
|
||
|
|
; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[TMP1]], [[ENTRY_SAME_CRIT_EDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
|
||
|
|
; CHECK-NEXT: ret i32 [[TMP2]]
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
%0 = callbr i32 asm "", "=r,!i"() to label %same [label %same]
|
||
|
|
same:
|
||
|
|
%1 = phi i32 [%0, %entry], [%0, %entry]
|
||
|
|
ret i32 %1
|
||
|
|
}
|
||
|
|
|
||
|
|
; "The Devil's cross" (i.e. two asm goto with conflicting physreg constraints
|
||
|
|
; going to the same destination).
|
||
|
|
define i64 @split_me6() {
|
||
|
|
; CHECK-LABEL: @split_me6(
|
||
|
|
; CHECK-NEXT: entry:
|
||
|
|
; CHECK-NEXT: [[TMP0:%.*]] = callbr i64 asm "# $0 $1", "={dx},!i"()
|
||
|
|
; CHECK-NEXT: to label [[ASM_FALLTHROUGH:%.*]] [label %entry.foo_crit_edge]
|
||
|
|
; CHECK: entry.foo_crit_edge:
|
||
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.callbr.landingpad.i64(i64 [[TMP0]])
|
||
|
|
; CHECK-NEXT: br label [[FOO:%.*]]
|
||
|
|
; CHECK: asm.fallthrough:
|
||
|
|
; CHECK-NEXT: [[TMP2:%.*]] = callbr i64 asm "# $0 $1", "={bx},!i"()
|
||
|
|
; CHECK-NEXT: to label [[FOO]] [label %asm.fallthrough.foo_crit_edge]
|
||
|
|
; CHECK: asm.fallthrough.foo_crit_edge:
|
||
|
|
; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.callbr.landingpad.i64(i64 [[TMP2]])
|
||
|
|
; CHECK-NEXT: br label [[FOO]]
|
||
|
|
; CHECK: foo:
|
||
|
|
; CHECK-NEXT: [[X_0:%.*]] = phi i64 [ [[TMP1]], [[ENTRY_FOO_CRIT_EDGE:%.*]] ], [ [[TMP3]], [[ASM_FALLTHROUGH_FOO_CRIT_EDGE:%.*]] ], [ [[TMP2]], [[ASM_FALLTHROUGH]] ]
|
||
|
|
; CHECK-NEXT: ret i64 [[X_0]]
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
%0 = callbr i64 asm "# $0 $1", "={dx},!i"()
|
||
|
|
to label %asm.fallthrough [label %foo]
|
||
|
|
|
||
|
|
asm.fallthrough:
|
||
|
|
%1 = callbr i64 asm "# $0 $1", "={bx},!i"()
|
||
|
|
to label %foo [label %foo]
|
||
|
|
|
||
|
|
foo:
|
||
|
|
%x.0 = phi i64 [ %0, %entry ], [ %1, %asm.fallthrough ], [ %1, %asm.fallthrough ]
|
||
|
|
ret i64 %x.0
|
||
|
|
}
|
||
|
|
|
||
|
|
; Test the result of the callbr having multiple uses to avoid iterator
|
||
|
|
; invalidation bugs in CallBrPrepare::UpdateSSA.
|
||
|
|
define i32 @multiple_split() {
|
||
|
|
; CHECK-LABEL: @multiple_split(
|
||
|
|
; CHECK-NEXT: entry:
|
||
|
|
; CHECK-NEXT: [[TMP0:%.*]] = callbr i32 asm "", "=r,!i"()
|
||
|
|
; CHECK-NEXT: to label [[X:%.*]] [label %y]
|
||
|
|
; CHECK: x:
|
||
|
|
; CHECK-NEXT: ret i32 42
|
||
|
|
; CHECK: y:
|
||
|
|
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.callbr.landingpad.i32(i32 [[TMP0]])
|
||
|
|
; CHECK-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[TMP1]]
|
||
|
|
; CHECK-NEXT: ret i32 [[TMP2]]
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
%0 = callbr i32 asm "", "=r,!i"()
|
||
|
|
to label %x [label %y]
|
||
|
|
|
||
|
|
x:
|
||
|
|
ret i32 42
|
||
|
|
|
||
|
|
y:
|
||
|
|
%1 = add nsw i32 %0, %0
|
||
|
|
ret i32 %1
|
||
|
|
}
|