241 lines
13 KiB
LLVM
241 lines
13 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p1,+bf16 < %s | FileCheck %s
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;
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; ST1Q: vector base + unscaled offset
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; e.g. st1q { z0.q }, p0, [z1.d, x0]
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;
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define void @sst1_scatter_u64base_offset_i8(<vscale x 16 x i8> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {
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; CHECK-LABEL: sst1_scatter_u64base_offset_i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv16i8.nxv2i64(<vscale x 16 x i8> %data,
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<vscale x 1 x i1> %pg,
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<vscale x 2 x i64> %b,
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i64 %offset)
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ret void
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}
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define void @sst1_scatter_u64base_offset_i16(<vscale x 8 x i16> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {
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; CHECK-LABEL: sst1_scatter_u64base_offset_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8i16.nxv2i64(<vscale x 8 x i16> %data,
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<vscale x 1 x i1> %pg,
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<vscale x 2 x i64> %b,
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i64 %offset)
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ret void
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}
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define void @sst1_scatter_u64base_offset_i32(<vscale x 4 x i32> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {
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; CHECK-LABEL: sst1_scatter_u64base_offset_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv4i32.nxv2i64(<vscale x 4 x i32> %data,
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<vscale x 1 x i1> %pg,
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<vscale x 2 x i64> %b,
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i64 %offset)
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ret void
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}
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define void @sst1_scatter_u64base_offset_i64(<vscale x 2 x i64> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {
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; CHECK-LABEL: sst1_scatter_u64base_offset_i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64> %data,
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<vscale x 1 x i1> %pg,
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<vscale x 2 x i64> %b,
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i64 %offset)
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ret void
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}
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define void @sst1_scatter_u64base_offset_f16(<vscale x 8 x half> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %base, i64 %offset) {
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; CHECK-LABEL: sst1_scatter_u64base_offset_f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8f16.nxv2i64(<vscale x 8 x half> %data,
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<vscale x 1 x i1> %pg,
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<vscale x 2 x i64> %base,
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i64 %offset)
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ret void
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}
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define void @sst1_scatter_u64base_offset_f32(<vscale x 4 x float> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {
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; CHECK-LABEL: sst1_scatter_u64base_offset_f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv4f32.nxv2i64(<vscale x 4 x float> %data,
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<vscale x 1 x i1> %pg,
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<vscale x 2 x i64> %b,
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i64 %offset)
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ret void
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}
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define void @sst1_scatter_u64base_offset_f64(<vscale x 2 x double> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {
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; CHECK-LABEL: sst1_scatter_u64base_offset_f64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double> %data,
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<vscale x 1 x i1> %pg,
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<vscale x 2 x i64> %b,
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i64 %offset)
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ret void
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}
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define void @sst1_scatter_u64base_offset_bf16(<vscale x 8 x bfloat> %data, <vscale x 1 x i1> %pg, <vscale x 2 x i64> %b, i64 %offset) {
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; CHECK-LABEL: sst1_scatter_u64base_offset_bf16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: st1q { z0.q }, p0, [z1.d, x0]
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8bf16.nxv2i64(<vscale x 8 x bfloat> %data,
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<vscale x 1 x i1> %pg,
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<vscale x 2 x i64> %b,
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i64 %offset)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_s8(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 16 x i8> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_s8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv16i8(<vscale x 16 x i8> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_u8(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 16 x i8> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_u8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv16i8(<vscale x 16 x i8> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_s16(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 8 x i16> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_s16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8i16(<vscale x 8 x i16> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_u16(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 8 x i16> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_u16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8i16(<vscale x 8 x i16> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_s32(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 4 x i32> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_s32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4i32(<vscale x 4 x i32> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_u32(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 4 x i32> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_u32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4i32(<vscale x 4 x i32> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_s64(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 2 x i64> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_s64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2i64(<vscale x 2 x i64> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_u64(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 2 x i64> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_u64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2i64(<vscale x 2 x i64> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_bf16(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 8 x bfloat> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_bf16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8bf16(<vscale x 8 x bfloat> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_f16(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 8 x half> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_f16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8f16(<vscale x 8 x half> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_f32(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 4 x float> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4f32(<vscale x 4 x float> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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define void @test_svst1q_scatter_u64offset_f64(<vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off, <vscale x 2 x double> %data) {
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; CHECK-LABEL: test_svst1q_scatter_u64offset_f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: st1q { z1.q }, p0, [z0.d, x0]
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; CHECK-NEXT: ret
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entry:
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tail call void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2f64(<vscale x 2 x double> %data, <vscale x 1 x i1> %pg, ptr %base, <vscale x 2 x i64> %off)
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ret void
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}
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declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv16i8.nxv2i64(<vscale x 16 x i8>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)
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declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8i16.nxv2i64(<vscale x 8 x i16>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)
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declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv4i32.nxv2i64(<vscale x 4 x i32>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)
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declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv2i64.nxv2i64(<vscale x 2 x i64>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)
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declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8f16.nxv2i64(<vscale x 8 x half>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)
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declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv4f32.nxv2i64(<vscale x 4 x float>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)
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declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv2f64.nxv2i64(<vscale x 2 x double>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)
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declare void @llvm.aarch64.sve.st1q.scatter.scalar.offset.nxv8bf16.nxv2i64(<vscale x 8 x bfloat>, <vscale x 1 x i1>, <vscale x 2 x i64>, i64)
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declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv16i8(<vscale x 16 x i8>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8i16(<vscale x 8 x i16>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4i32(<vscale x 4 x i32>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2i64(<vscale x 2 x i64>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv8f16(<vscale x 8 x half>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv4f32(<vscale x 4 x float>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sve.st1q.scatter.vector.offset.nxv2f64(<vscale x 2 x double>, <vscale x 1 x i1>, ptr, <vscale x 2 x i64>)
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