287 lines
12 KiB
LLVM
287 lines
12 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 %s
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; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s
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; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX10PLUS,GFX11 %s
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; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12 %s
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define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw(<8 x i32> inreg %rsrc, i16 %s, i16 %t, i16 %r) {
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; GFX9-LABEL: load_3d_v4f32_xyzw:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX9-NEXT: s_mov_b32 s0, s2
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; GFX9-NEXT: s_mov_b32 s1, s3
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; GFX9-NEXT: s_mov_b32 s2, s4
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; GFX9-NEXT: s_mov_b32 s3, s5
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; GFX9-NEXT: s_mov_b32 s4, s6
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; GFX9-NEXT: s_mov_b32 s5, s7
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; GFX9-NEXT: s_mov_b32 s6, s8
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; GFX9-NEXT: s_mov_b32 s7, s9
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; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v0
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; GFX9-NEXT: image_load v[0:3], v[1:2], s[0:7] dmask:0xf unorm a16
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog
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;
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; GFX10PLUS-LABEL: load_3d_v4f32_xyzw:
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; GFX10PLUS: ; %bb.0:
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; GFX10PLUS-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX10PLUS-NEXT: s_mov_b32 s0, s2
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; GFX10PLUS-NEXT: s_mov_b32 s1, s3
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; GFX10PLUS-NEXT: s_mov_b32 s2, s4
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; GFX10PLUS-NEXT: s_mov_b32 s3, s5
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; GFX10PLUS-NEXT: v_lshl_or_b32 v1, v1, 16, v0
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; GFX10PLUS-NEXT: s_mov_b32 s4, s6
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; GFX10PLUS-NEXT: s_mov_b32 s5, s7
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; GFX10PLUS-NEXT: s_mov_b32 s6, s8
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; GFX10PLUS-NEXT: s_mov_b32 s7, s9
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; GFX10PLUS-NEXT: image_load v[0:3], v[1:2], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16
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; GFX10PLUS-NEXT: s_waitcnt vmcnt(0)
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; GFX10PLUS-NEXT: ; return to shader part epilog
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;
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; GFX12-LABEL: load_3d_v4f32_xyzw:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX12-NEXT: s_mov_b32 s0, s2
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; GFX12-NEXT: s_mov_b32 s1, s3
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; GFX12-NEXT: s_mov_b32 s2, s4
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; GFX12-NEXT: s_mov_b32 s3, s5
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; GFX12-NEXT: v_lshl_or_b32 v0, v1, 16, v0
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; GFX12-NEXT: s_mov_b32 s4, s6
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; GFX12-NEXT: s_mov_b32 s5, s7
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; GFX12-NEXT: s_mov_b32 s6, s8
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; GFX12-NEXT: s_mov_b32 s7, s9
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; GFX12-NEXT: image_load v[0:3], [v0, v2], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D a16
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: ; return to shader part epilog
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%v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0)
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ret <4 x float> %v
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}
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define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe(<8 x i32> inreg %rsrc, ptr addrspace(1) inreg %out, i16 %s, i16 %t, i16 %r) {
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; GFX9-LABEL: load_3d_v4f32_xyzw_tfe:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX9-NEXT: v_mov_b32_e32 v7, 0
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; GFX9-NEXT: v_mov_b32_e32 v6, v2
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; GFX9-NEXT: v_lshl_or_b32 v5, v1, 16, v0
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; GFX9-NEXT: v_mov_b32_e32 v8, v7
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; GFX9-NEXT: v_mov_b32_e32 v9, v7
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; GFX9-NEXT: v_mov_b32_e32 v10, v7
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; GFX9-NEXT: v_mov_b32_e32 v11, v7
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; GFX9-NEXT: v_mov_b32_e32 v0, v7
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; GFX9-NEXT: s_mov_b32 s0, s2
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; GFX9-NEXT: s_mov_b32 s1, s3
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; GFX9-NEXT: s_mov_b32 s2, s4
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; GFX9-NEXT: s_mov_b32 s3, s5
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; GFX9-NEXT: s_mov_b32 s4, s6
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; GFX9-NEXT: s_mov_b32 s5, s7
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; GFX9-NEXT: s_mov_b32 s6, s8
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; GFX9-NEXT: s_mov_b32 s7, s9
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; GFX9-NEXT: v_mov_b32_e32 v1, v8
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; GFX9-NEXT: v_mov_b32_e32 v2, v9
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; GFX9-NEXT: v_mov_b32_e32 v3, v10
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; GFX9-NEXT: v_mov_b32_e32 v4, v11
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; GFX9-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf unorm a16 tfe
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: global_store_dword v7, v4, s[10:11]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog
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;
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; GFX10-LABEL: load_3d_v4f32_xyzw_tfe:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: v_mov_b32_e32 v7, 0
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; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX10-NEXT: v_mov_b32_e32 v6, v2
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; GFX10-NEXT: s_mov_b32 s0, s2
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; GFX10-NEXT: s_mov_b32 s1, s3
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; GFX10-NEXT: v_mov_b32_e32 v8, v7
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; GFX10-NEXT: v_mov_b32_e32 v9, v7
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; GFX10-NEXT: v_mov_b32_e32 v10, v7
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; GFX10-NEXT: v_mov_b32_e32 v11, v7
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; GFX10-NEXT: v_lshl_or_b32 v5, v1, 16, v0
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; GFX10-NEXT: s_mov_b32 s2, s4
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; GFX10-NEXT: s_mov_b32 s3, s5
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; GFX10-NEXT: s_mov_b32 s4, s6
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; GFX10-NEXT: s_mov_b32 s5, s7
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; GFX10-NEXT: s_mov_b32 s6, s8
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; GFX10-NEXT: s_mov_b32 s7, s9
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; GFX10-NEXT: v_mov_b32_e32 v0, v7
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; GFX10-NEXT: v_mov_b32_e32 v1, v8
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; GFX10-NEXT: v_mov_b32_e32 v2, v9
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; GFX10-NEXT: v_mov_b32_e32 v3, v10
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; GFX10-NEXT: v_mov_b32_e32 v4, v11
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; GFX10-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 tfe
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; GFX10-NEXT: s_waitcnt vmcnt(0)
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; GFX10-NEXT: global_store_dword v7, v4, s[10:11]
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; GFX10-NEXT: ; return to shader part epilog
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;
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; GFX11-LABEL: load_3d_v4f32_xyzw_tfe:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: v_dual_mov_b32 v6, v2 :: v_dual_mov_b32 v7, 0
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; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX11-NEXT: s_mov_b32 s0, s2
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; GFX11-NEXT: s_mov_b32 s1, s3
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; GFX11-NEXT: s_mov_b32 s2, s4
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; GFX11-NEXT: v_mov_b32_e32 v9, v7
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; GFX11-NEXT: v_mov_b32_e32 v8, v7
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; GFX11-NEXT: v_mov_b32_e32 v10, v7
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; GFX11-NEXT: v_mov_b32_e32 v11, v7
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; GFX11-NEXT: v_lshl_or_b32 v5, v1, 16, v0
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; GFX11-NEXT: s_mov_b32 s3, s5
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; GFX11-NEXT: s_mov_b32 s4, s6
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; GFX11-NEXT: s_mov_b32 s5, s7
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; GFX11-NEXT: s_mov_b32 s6, s8
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; GFX11-NEXT: s_mov_b32 s7, s9
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; GFX11-NEXT: v_dual_mov_b32 v0, v7 :: v_dual_mov_b32 v1, v8
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; GFX11-NEXT: v_dual_mov_b32 v2, v9 :: v_dual_mov_b32 v3, v10
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; GFX11-NEXT: v_mov_b32_e32 v4, v11
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; GFX11-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 tfe
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; GFX11-NEXT: s_waitcnt vmcnt(0)
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; GFX11-NEXT: global_store_b32 v7, v4, s[10:11]
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; GFX11-NEXT: ; return to shader part epilog
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;
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; GFX12-LABEL: load_3d_v4f32_xyzw_tfe:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v6, 0
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; GFX12-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX12-NEXT: s_mov_b32 s0, s2
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; GFX12-NEXT: s_mov_b32 s1, s3
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; GFX12-NEXT: s_mov_b32 s2, s4
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; GFX12-NEXT: v_dual_mov_b32 v7, v6 :: v_dual_mov_b32 v8, v6
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; GFX12-NEXT: v_dual_mov_b32 v9, v6 :: v_dual_mov_b32 v10, v6
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; GFX12-NEXT: v_lshl_or_b32 v11, v1, 16, v0
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; GFX12-NEXT: s_mov_b32 s3, s5
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; GFX12-NEXT: s_mov_b32 s4, s6
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; GFX12-NEXT: s_mov_b32 s5, s7
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; GFX12-NEXT: s_mov_b32 s6, s8
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; GFX12-NEXT: s_mov_b32 s7, s9
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; GFX12-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
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; GFX12-NEXT: v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9
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; GFX12-NEXT: v_mov_b32_e32 v4, v10
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; GFX12-NEXT: image_load v[0:4], [v11, v5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D a16 tfe
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: global_store_b32 v6, v4, s[10:11]
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; GFX12-NEXT: ; return to shader part epilog
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%v = call { <4 x float>, i32 } @llvm.amdgcn.image.load.3d.sl_v4f32i32s.i16(i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 1, i32 0)
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%v.vec = extractvalue { <4 x float>, i32 } %v, 0
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%v.err = extractvalue { <4 x float>, i32 } %v, 1
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store i32 %v.err, ptr addrspace(1) %out, align 4
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ret <4 x float> %v.vec
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}
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define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe_lwe(<8 x i32> inreg %rsrc, ptr addrspace(1) inreg %out, i16 %s, i16 %t, i16 %r) {
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; GFX9-LABEL: load_3d_v4f32_xyzw_tfe_lwe:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX9-NEXT: v_mov_b32_e32 v7, 0
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; GFX9-NEXT: v_mov_b32_e32 v6, v2
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; GFX9-NEXT: v_lshl_or_b32 v5, v1, 16, v0
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; GFX9-NEXT: v_mov_b32_e32 v8, v7
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; GFX9-NEXT: v_mov_b32_e32 v9, v7
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; GFX9-NEXT: v_mov_b32_e32 v10, v7
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; GFX9-NEXT: v_mov_b32_e32 v11, v7
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; GFX9-NEXT: v_mov_b32_e32 v0, v7
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; GFX9-NEXT: s_mov_b32 s0, s2
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; GFX9-NEXT: s_mov_b32 s1, s3
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; GFX9-NEXT: s_mov_b32 s2, s4
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; GFX9-NEXT: s_mov_b32 s3, s5
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; GFX9-NEXT: s_mov_b32 s4, s6
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; GFX9-NEXT: s_mov_b32 s5, s7
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; GFX9-NEXT: s_mov_b32 s6, s8
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; GFX9-NEXT: s_mov_b32 s7, s9
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; GFX9-NEXT: v_mov_b32_e32 v1, v8
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; GFX9-NEXT: v_mov_b32_e32 v2, v9
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; GFX9-NEXT: v_mov_b32_e32 v3, v10
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; GFX9-NEXT: v_mov_b32_e32 v4, v11
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; GFX9-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf unorm a16 tfe lwe
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: global_store_dword v7, v4, s[10:11]
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: ; return to shader part epilog
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;
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; GFX10-LABEL: load_3d_v4f32_xyzw_tfe_lwe:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: v_mov_b32_e32 v7, 0
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; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0
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; GFX10-NEXT: v_mov_b32_e32 v6, v2
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; GFX10-NEXT: s_mov_b32 s0, s2
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; GFX10-NEXT: s_mov_b32 s1, s3
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; GFX10-NEXT: v_mov_b32_e32 v8, v7
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; GFX10-NEXT: v_mov_b32_e32 v9, v7
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; GFX10-NEXT: v_mov_b32_e32 v10, v7
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; GFX10-NEXT: v_mov_b32_e32 v11, v7
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; GFX10-NEXT: v_lshl_or_b32 v5, v1, 16, v0
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; GFX10-NEXT: s_mov_b32 s2, s4
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; GFX10-NEXT: s_mov_b32 s3, s5
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; GFX10-NEXT: s_mov_b32 s4, s6
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; GFX10-NEXT: s_mov_b32 s5, s7
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; GFX10-NEXT: s_mov_b32 s6, s8
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; GFX10-NEXT: s_mov_b32 s7, s9
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; GFX10-NEXT: v_mov_b32_e32 v0, v7
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; GFX10-NEXT: v_mov_b32_e32 v1, v8
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; GFX10-NEXT: v_mov_b32_e32 v2, v9
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; GFX10-NEXT: v_mov_b32_e32 v3, v10
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; GFX10-NEXT: v_mov_b32_e32 v4, v11
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; GFX10-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 tfe lwe
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; GFX10-NEXT: s_waitcnt vmcnt(0)
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; GFX10-NEXT: global_store_dword v7, v4, s[10:11]
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; GFX10-NEXT: ; return to shader part epilog
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;
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|
; GFX11-LABEL: load_3d_v4f32_xyzw_tfe_lwe:
|
||
|
|
; GFX11: ; %bb.0:
|
||
|
|
; GFX11-NEXT: v_dual_mov_b32 v6, v2 :: v_dual_mov_b32 v7, 0
|
||
|
|
; GFX11-NEXT: v_and_b32_e32 v0, 0xffff, v0
|
||
|
|
; GFX11-NEXT: s_mov_b32 s0, s2
|
||
|
|
; GFX11-NEXT: s_mov_b32 s1, s3
|
||
|
|
; GFX11-NEXT: s_mov_b32 s2, s4
|
||
|
|
; GFX11-NEXT: v_mov_b32_e32 v9, v7
|
||
|
|
; GFX11-NEXT: v_mov_b32_e32 v8, v7
|
||
|
|
; GFX11-NEXT: v_mov_b32_e32 v10, v7
|
||
|
|
; GFX11-NEXT: v_mov_b32_e32 v11, v7
|
||
|
|
; GFX11-NEXT: v_lshl_or_b32 v5, v1, 16, v0
|
||
|
|
; GFX11-NEXT: s_mov_b32 s3, s5
|
||
|
|
; GFX11-NEXT: s_mov_b32 s4, s6
|
||
|
|
; GFX11-NEXT: s_mov_b32 s5, s7
|
||
|
|
; GFX11-NEXT: s_mov_b32 s6, s8
|
||
|
|
; GFX11-NEXT: s_mov_b32 s7, s9
|
||
|
|
; GFX11-NEXT: v_dual_mov_b32 v0, v7 :: v_dual_mov_b32 v1, v8
|
||
|
|
; GFX11-NEXT: v_dual_mov_b32 v2, v9 :: v_dual_mov_b32 v3, v10
|
||
|
|
; GFX11-NEXT: v_mov_b32_e32 v4, v11
|
||
|
|
; GFX11-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 tfe lwe
|
||
|
|
; GFX11-NEXT: s_waitcnt vmcnt(0)
|
||
|
|
; GFX11-NEXT: global_store_b32 v7, v4, s[10:11]
|
||
|
|
; GFX11-NEXT: ; return to shader part epilog
|
||
|
|
;
|
||
|
|
; GFX12-LABEL: load_3d_v4f32_xyzw_tfe_lwe:
|
||
|
|
; GFX12: ; %bb.0:
|
||
|
|
; GFX12-NEXT: v_dual_mov_b32 v5, v2 :: v_dual_mov_b32 v6, 0
|
||
|
|
; GFX12-NEXT: v_and_b32_e32 v0, 0xffff, v0
|
||
|
|
; GFX12-NEXT: s_mov_b32 s0, s2
|
||
|
|
; GFX12-NEXT: s_mov_b32 s1, s3
|
||
|
|
; GFX12-NEXT: s_mov_b32 s2, s4
|
||
|
|
; GFX12-NEXT: v_dual_mov_b32 v7, v6 :: v_dual_mov_b32 v8, v6
|
||
|
|
; GFX12-NEXT: v_dual_mov_b32 v9, v6 :: v_dual_mov_b32 v10, v6
|
||
|
|
; GFX12-NEXT: v_lshl_or_b32 v11, v1, 16, v0
|
||
|
|
; GFX12-NEXT: s_mov_b32 s3, s5
|
||
|
|
; GFX12-NEXT: s_mov_b32 s4, s6
|
||
|
|
; GFX12-NEXT: s_mov_b32 s5, s7
|
||
|
|
; GFX12-NEXT: s_mov_b32 s6, s8
|
||
|
|
; GFX12-NEXT: s_mov_b32 s7, s9
|
||
|
|
; GFX12-NEXT: v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
|
||
|
|
; GFX12-NEXT: v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9
|
||
|
|
; GFX12-NEXT: v_mov_b32_e32 v4, v10
|
||
|
|
; GFX12-NEXT: image_load v[0:4], [v11, v5], s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D a16 tfe
|
||
|
|
; GFX12-NEXT: s_wait_loadcnt 0x0
|
||
|
|
; GFX12-NEXT: global_store_b32 v6, v4, s[10:11]
|
||
|
|
; GFX12-NEXT: ; return to shader part epilog
|
||
|
|
%v = call { <4 x float>, i32 } @llvm.amdgcn.image.load.3d.sl_v4f32i32s.i16(i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 3, i32 0)
|
||
|
|
%v.vec = extractvalue { <4 x float>, i32 } %v, 0
|
||
|
|
%v.err = extractvalue { <4 x float>, i32 } %v, 1
|
||
|
|
store i32 %v.err, ptr addrspace(1) %out, align 4
|
||
|
|
ret <4 x float> %v.vec
|
||
|
|
}
|
||
|
|
|
||
|
|
declare <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 immarg, i16, i16, i16, <8 x i32>, i32 immarg, i32 immarg) #0
|
||
|
|
declare { <4 x float>, i32 } @llvm.amdgcn.image.load.3d.sl_v4f32i32s.i16(i32 immarg, i16, i16, i16, <8 x i32>, i32 immarg, i32 immarg) #0
|
||
|
|
|
||
|
|
attributes #0 = { nounwind readonly }
|