226 lines
8.2 KiB
Text
226 lines
8.2 KiB
Text
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -run-pass=machine-sink -o - %s | FileCheck %s
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# A VGPR loop variable was incorrectly sunk into a flow block, past
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# the si_end_cf reconvergence point.
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---
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name: machinesink_loop_vgpr_out_of_divergent_loop
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tracksRegLiveness: true
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machineFunctionInfo:
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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body: |
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; CHECK-LABEL: name: machinesink_loop_vgpr_out_of_divergent_loop
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $sgpr8
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[COPY1]], %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: S_BRANCH %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[SI_IF1:%[0-9]+]]:sreg_32 = SI_IF [[COPY1]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: S_BRANCH %bb.3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: S_NOP 0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.4:
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; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
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; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK killed [[SI_IF1]], [[SI_IF]], implicit-def dead $scc
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; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: S_BRANCH %bb.5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.5:
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.4
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; CHECK-NEXT: SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
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; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]]
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; CHECK-NEXT: S_BRANCH %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.6:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.7(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: SI_LOOP [[SI_IF]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: S_BRANCH %bb.7
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.7:
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; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.8(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc
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; CHECK-NEXT: S_BRANCH %bb.8
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.8:
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; CHECK-NEXT: SI_RETURN
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bb.0:
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liveins: $vgpr0, $vgpr1, $sgpr8
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%0:vgpr_32 = COPY $vgpr0
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%1:sreg_32 = COPY $sgpr8
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%2:vgpr_32 = COPY $vgpr1
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bb.1:
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%3:sreg_32 = SI_IF %1, %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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%4:sreg_32 = SI_IF %1, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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S_BRANCH %bb.3
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bb.3:
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S_NOP 0
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bb.4:
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INLINEASM &"", 1 /* sideeffect attdialect */
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%5:vgpr_32 = V_ADD_U32_e64 %0, %1, 0, implicit $exec
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%6:sreg_32 = SI_IF_BREAK killed %4, %3, implicit-def dead $scc
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SI_LOOP %6, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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S_BRANCH %bb.5
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bb.5:
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%7:vgpr_32 = PHI %0, %bb.4
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SI_END_CF %6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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INLINEASM &"", 1, implicit %5
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S_BRANCH %bb.2
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bb.6:
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SI_LOOP %3, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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S_BRANCH %bb.7
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bb.7:
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S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc
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S_BRANCH %bb.8
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bb.8:
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SI_RETURN
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...
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# The same testcase, except the relevant instruction is scalar and
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# could be legally sunk.
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---
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name: machinesink_loop_sgpr_out_of_divergent_loop
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tracksRegLiveness: true
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machineFunctionInfo:
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scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'
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frameOffsetReg: '$sgpr33'
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stackPtrOffsetReg: '$sgpr32'
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body: |
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; CHECK-LABEL: name: machinesink_loop_sgpr_out_of_divergent_loop
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.1(0x80000000)
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; CHECK-NEXT: liveins: $sgpr8, $sgpr9, $sgpr10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr8
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr9
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.2(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[COPY1]], %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: S_BRANCH %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2:
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; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.3(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[SI_IF1:%[0-9]+]]:sreg_32 = SI_IF [[COPY1]], %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: S_BRANCH %bb.3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: S_NOP 0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.4:
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; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
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; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK killed [[SI_IF1]], [[SI_IF]], implicit-def dead $scc
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; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: S_BRANCH %bb.5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.5:
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; CHECK-NEXT: successors: %bb.2(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.4
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; CHECK-NEXT: SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[S_ADD_I32_]]
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; CHECK-NEXT: S_BRANCH %bb.2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.6:
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; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.7(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: SI_LOOP [[SI_IF]], %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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; CHECK-NEXT: S_BRANCH %bb.7
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.7:
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; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.8(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc
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; CHECK-NEXT: S_BRANCH %bb.8
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.8:
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; CHECK-NEXT: SI_RETURN
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bb.0:
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liveins: $sgpr8, $sgpr9, $sgpr10
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%0:sreg_32 = COPY $sgpr8
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%1:sreg_32 = COPY $sgpr9
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%2:sreg_32 = COPY $sgpr10
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bb.1:
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%3:sreg_32 = SI_IF %1, %bb.6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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S_BRANCH %bb.2
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bb.2:
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%4:sreg_32 = SI_IF %1, %bb.4, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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S_BRANCH %bb.3
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bb.3:
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S_NOP 0
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bb.4:
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INLINEASM &"", 1 /* sideeffect attdialect */
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%5:sreg_32 = S_ADD_I32 %0, %1, implicit-def dead $scc
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%6:sreg_32 = SI_IF_BREAK killed %4, %3, implicit-def dead $scc
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SI_LOOP %6, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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S_BRANCH %bb.5
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bb.5:
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%7:vgpr_32 = PHI %0, %bb.4
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SI_END_CF %6, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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INLINEASM &"", 1, implicit %5
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S_BRANCH %bb.2
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bb.6:
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SI_LOOP %3, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
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S_BRANCH %bb.7
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bb.7:
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S_CBRANCH_VCCNZ %bb.7, implicit undef $vcc
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S_BRANCH %bb.8
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bb.8:
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SI_RETURN
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...
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