215 lines
9.7 KiB
LLVM
215 lines
9.7 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs | FileCheck %s --check-prefixes=SDAG
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; RUN: llc < %s -global-isel -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL
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define amdgpu_kernel void @buffers_dont_alias(ptr addrspace(8) noalias %a, ptr addrspace(8) noalias %b) {
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; SDAG-LABEL: buffers_dont_alias:
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; SDAG: ; %bb.0:
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; SDAG-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
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; SDAG-NEXT: s_waitcnt lgkmcnt(0)
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; SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0
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; SDAG-NEXT: s_waitcnt vmcnt(0)
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; SDAG-NEXT: v_mul_f32_e32 v0, v0, v0
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; SDAG-NEXT: v_mul_f32_e32 v1, v1, v1
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; SDAG-NEXT: v_mul_f32_e32 v2, v2, v2
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; SDAG-NEXT: v_mul_f32_e32 v3, v3, v3
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; SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
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; SDAG-NEXT: s_endpgm
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;
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; GISEL-LABEL: buffers_dont_alias:
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; GISEL: ; %bb.0:
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; GISEL-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
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; GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GISEL-NEXT: buffer_load_dwordx4 v[0:3], off, s[0:3], 0
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; GISEL-NEXT: s_waitcnt vmcnt(0)
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; GISEL-NEXT: v_mul_f32_e32 v0, v0, v0
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; GISEL-NEXT: v_mul_f32_e32 v1, v1, v1
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; GISEL-NEXT: v_mul_f32_e32 v2, v2, v2
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; GISEL-NEXT: v_mul_f32_e32 v3, v3, v3
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; GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
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; GISEL-NEXT: s_endpgm
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%l0 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 0, i32 0, i32 0)
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%s0 = fmul float %l0, %l0
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s0, ptr addrspace(8) %b, i32 0, i32 0, i32 0)
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%l1 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 4, i32 0, i32 0)
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%s1 = fmul float %l1, %l1
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s1, ptr addrspace(8) %b, i32 4, i32 0, i32 0)
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%l2 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 8, i32 0, i32 0)
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%s2 = fmul float %l2, %l2
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s2, ptr addrspace(8) %b, i32 8, i32 0, i32 0)
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%l3 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 12, i32 0, i32 0)
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%s3 = fmul float %l3, %l3
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s3, ptr addrspace(8) %b, i32 12, i32 0, i32 0)
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ret void
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}
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define amdgpu_kernel void @buffers_from_flat_dont_alias(ptr noalias %a.flat, ptr noalias %b.flat) {
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; SDAG-LABEL: buffers_from_flat_dont_alias:
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; SDAG: ; %bb.0:
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; SDAG-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
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; SDAG-NEXT: s_mov_b32 s7, 0
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; SDAG-NEXT: s_mov_b32 s6, 16
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; SDAG-NEXT: s_waitcnt lgkmcnt(0)
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; SDAG-NEXT: s_and_b32 s5, s1, 0xffff
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; SDAG-NEXT: s_mov_b32 s4, s0
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; SDAG-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0
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; SDAG-NEXT: s_and_b32 s5, s3, 0xffff
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; SDAG-NEXT: s_mov_b32 s4, s2
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; SDAG-NEXT: s_waitcnt vmcnt(0)
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; SDAG-NEXT: v_mul_f32_e32 v0, v0, v0
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; SDAG-NEXT: v_mul_f32_e32 v1, v1, v1
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; SDAG-NEXT: v_mul_f32_e32 v2, v2, v2
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; SDAG-NEXT: v_mul_f32_e32 v3, v3, v3
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; SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
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; SDAG-NEXT: s_endpgm
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;
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; GISEL-LABEL: buffers_from_flat_dont_alias:
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; GISEL: ; %bb.0:
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; GISEL-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
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; GISEL-NEXT: s_mov_b32 s7, 0
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; GISEL-NEXT: s_mov_b32 s6, 16
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; GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GISEL-NEXT: s_and_b32 s5, s1, 0xffff
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; GISEL-NEXT: s_mov_b32 s4, s0
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; GISEL-NEXT: buffer_load_dwordx4 v[0:3], off, s[4:7], 0
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; GISEL-NEXT: s_and_b32 s5, s3, 0xffff
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; GISEL-NEXT: s_mov_b32 s4, s2
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; GISEL-NEXT: s_waitcnt vmcnt(0)
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; GISEL-NEXT: v_mul_f32_e32 v0, v0, v0
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; GISEL-NEXT: v_mul_f32_e32 v1, v1, v1
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; GISEL-NEXT: v_mul_f32_e32 v2, v2, v2
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; GISEL-NEXT: v_mul_f32_e32 v3, v3, v3
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; GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
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; GISEL-NEXT: s_endpgm
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%a = call ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p0(ptr %a.flat, i16 0, i32 16, i32 0)
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%b = call ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p0(ptr %b.flat, i16 0, i32 16, i32 0)
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%l0 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 0, i32 0, i32 0)
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%s0 = fmul float %l0, %l0
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s0, ptr addrspace(8) %b, i32 0, i32 0, i32 0)
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%l1 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 4, i32 0, i32 0)
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%s1 = fmul float %l1, %l1
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s1, ptr addrspace(8) %b, i32 4, i32 0, i32 0)
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%l2 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 8, i32 0, i32 0)
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%s2 = fmul float %l2, %l2
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s2, ptr addrspace(8) %b, i32 8, i32 0, i32 0)
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%l3 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 12, i32 0, i32 0)
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%s3 = fmul float %l3, %l3
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s3, ptr addrspace(8) %b, i32 12, i32 0, i32 0)
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ret void
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}
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define amdgpu_kernel void @buffers_might_alias(ptr addrspace(8) %a, ptr addrspace(8) %b) {
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; SDAG-LABEL: buffers_might_alias:
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; SDAG: ; %bb.0:
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; SDAG-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
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; SDAG-NEXT: s_waitcnt lgkmcnt(0)
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; SDAG-NEXT: buffer_load_dword v0, off, s[0:3], 0
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; SDAG-NEXT: s_waitcnt vmcnt(0)
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; SDAG-NEXT: v_mul_f32_e32 v0, v0, v0
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; SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
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; SDAG-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:4
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; SDAG-NEXT: s_waitcnt vmcnt(0)
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; SDAG-NEXT: v_mul_f32_e32 v0, v0, v0
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; SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0 offset:4
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; SDAG-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:8
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; SDAG-NEXT: s_waitcnt vmcnt(0)
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; SDAG-NEXT: v_mul_f32_e32 v0, v0, v0
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; SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0 offset:8
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; SDAG-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:12
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; SDAG-NEXT: s_waitcnt vmcnt(0)
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; SDAG-NEXT: v_mul_f32_e32 v0, v0, v0
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; SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0 offset:12
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; SDAG-NEXT: s_endpgm
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;
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; GISEL-LABEL: buffers_might_alias:
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; GISEL: ; %bb.0:
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; GISEL-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
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; GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GISEL-NEXT: buffer_load_dword v0, off, s[0:3], 0
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; GISEL-NEXT: s_waitcnt vmcnt(0)
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; GISEL-NEXT: v_mul_f32_e32 v0, v0, v0
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; GISEL-NEXT: buffer_store_dword v0, off, s[4:7], 0
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; GISEL-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:4
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; GISEL-NEXT: s_waitcnt vmcnt(0)
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; GISEL-NEXT: v_mul_f32_e32 v0, v0, v0
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; GISEL-NEXT: buffer_store_dword v0, off, s[4:7], 0 offset:4
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; GISEL-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:8
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; GISEL-NEXT: s_waitcnt vmcnt(0)
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; GISEL-NEXT: v_mul_f32_e32 v0, v0, v0
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; GISEL-NEXT: buffer_store_dword v0, off, s[4:7], 0 offset:8
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; GISEL-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:12
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; GISEL-NEXT: s_waitcnt vmcnt(0)
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; GISEL-NEXT: v_mul_f32_e32 v0, v0, v0
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; GISEL-NEXT: buffer_store_dword v0, off, s[4:7], 0 offset:12
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; GISEL-NEXT: s_endpgm
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%l0 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 0, i32 0, i32 0)
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%s0 = fmul float %l0, %l0
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s0, ptr addrspace(8) %b, i32 0, i32 0, i32 0)
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%l1 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 4, i32 0, i32 0)
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%s1 = fmul float %l1, %l1
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s1, ptr addrspace(8) %b, i32 4, i32 0, i32 0)
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%l2 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 8, i32 0, i32 0)
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%s2 = fmul float %l2, %l2
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s2, ptr addrspace(8) %b, i32 8, i32 0, i32 0)
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%l3 = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 12, i32 0, i32 0)
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%s3 = fmul float %l3, %l3
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %s3, ptr addrspace(8) %b, i32 12, i32 0, i32 0)
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ret void
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}
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define amdgpu_kernel void @independent_offsets(ptr addrspace(8) %a) {
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; SDAG-LABEL: independent_offsets:
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; SDAG: ; %bb.0:
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; SDAG-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
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; SDAG-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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; SDAG-NEXT: v_mov_b32_e32 v2, 1.0
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; SDAG-NEXT: s_waitcnt lgkmcnt(0)
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; SDAG-NEXT: buffer_load_dword v1, v0, s[0:3], 0 offen offset:4
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; SDAG-NEXT: s_nop 0
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; SDAG-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
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; SDAG-NEXT: s_waitcnt vmcnt(1)
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; SDAG-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
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; SDAG-NEXT: s_endpgm
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;
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; GISEL-LABEL: independent_offsets:
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; GISEL: ; %bb.0:
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; GISEL-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
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; GISEL-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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; GISEL-NEXT: v_mov_b32_e32 v2, 1.0
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; GISEL-NEXT: s_waitcnt lgkmcnt(0)
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; GISEL-NEXT: buffer_load_dword v1, v0, s[0:3], 0 offen offset:4
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; GISEL-NEXT: s_nop 0
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; GISEL-NEXT: buffer_store_dword v2, v0, s[0:3], 0 offen
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; GISEL-NEXT: s_waitcnt vmcnt(1)
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; GISEL-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen offset:8
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; GISEL-NEXT: s_endpgm
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%lane = call i32 @llvm.amdgcn.workitem.id.x()
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%idx = shl i32 %lane, 2
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float 1.0, ptr addrspace(8) %a, i32 %idx, i32 0, i32 0)
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%idx.1 = add i32 %idx, 4
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%idx.2 = add i32 %idx, 8
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%val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %a, i32 %idx.1, i32 0, i32 0)
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call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %val, ptr addrspace(8) %a, i32 %idx.2, i32 0, i32 0)
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x()
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declare float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8), i32, i32, i32)
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declare void @llvm.amdgcn.raw.ptr.buffer.store.f32(float, ptr addrspace(8), i32, i32, i32 immarg)
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declare ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p0(ptr readnone nocapture, i16, i32, i32)
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