84 lines
3.3 KiB
Text
84 lines
3.3 KiB
Text
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass liveintervals,phi-node-elimination -o - %s | FileCheck -check-prefixes=GCN %s
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# This checks liveintervals pass verification and phi-node-elimination correctly preserves them.
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---
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name: split_critical_edge_subranges
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tracksRegLiveness: true
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body: |
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; GCN-LABEL: name: split_critical_edge_subranges
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; GCN: bb.0:
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; GCN-NEXT: successors: %bb.5(0x40000000), %bb.1(0x40000000)
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: %coord:vreg_64 = IMPLICIT_DEF
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; GCN-NEXT: %desc:sgpr_256 = IMPLICIT_DEF
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; GCN-NEXT: %c0:sreg_32 = IMPLICIT_DEF
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; GCN-NEXT: %c1:sreg_32 = IMPLICIT_DEF
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; GCN-NEXT: %const:vgpr_32 = IMPLICIT_DEF
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; GCN-NEXT: %load:vreg_64 = IMAGE_LOAD_V2_V2_gfx11 %coord, %desc, 3, 1, -1, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s64), align 16, addrspace 4)
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; GCN-NEXT: %s0a:vgpr_32 = COPY %load.sub0
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; GCN-NEXT: %s0b:vgpr_32 = COPY %load.sub1
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; GCN-NEXT: S_CMP_EQ_U32 %c0, %c1, implicit-def $scc
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; GCN-NEXT: S_CBRANCH_SCC0 %bb.1, implicit $scc
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.5:
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; GCN-NEXT: successors: %bb.3(0x80000000)
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY %s0a
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; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY %s0b
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; GCN-NEXT: S_BRANCH %bb.3
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.1:
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; GCN-NEXT: successors: %bb.3(0x80000000)
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: %s0c:vgpr_32 = V_ADD_F32_e64 0, %s0a, 0, %const, 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: %s0d:vgpr_32 = V_ADD_F32_e64 0, %s0b, 0, %const, 0, 0, implicit $mode, implicit $exec
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; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY %s0c
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; GCN-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY %s0d
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; GCN-NEXT: S_BRANCH %bb.3
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.2:
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; GCN-NEXT: S_NOP 0
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; GCN-NEXT: S_ENDPGM 0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.3:
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; GCN-NEXT: successors: %bb.4(0x80000000)
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: %phi1:vgpr_32 = COPY [[COPY3]]
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; GCN-NEXT: %phi0:vgpr_32 = COPY [[COPY2]]
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; GCN-NEXT: S_BRANCH %bb.4
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: bb.4:
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; GCN-NEXT: S_ENDPGM 0, implicit %phi0, implicit %phi1
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bb.0:
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%coord:vreg_64 = IMPLICIT_DEF
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%desc:sgpr_256 = IMPLICIT_DEF
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%c0:sreg_32 = IMPLICIT_DEF
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%c1:sreg_32 = IMPLICIT_DEF
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%const:vgpr_32 = IMPLICIT_DEF
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%load:vreg_64 = IMAGE_LOAD_V2_V2_gfx11 %coord:vreg_64, killed %desc:sgpr_256, 3, 1, -1, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s64), align 16, addrspace 4)
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%s0a:vgpr_32 = COPY %load.sub0:vreg_64
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%s0b:vgpr_32 = COPY %load.sub1:vreg_64
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S_CMP_EQ_U32 killed %c0:sreg_32, killed %c1:sreg_32, implicit-def $scc
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S_CBRANCH_SCC1 %bb.3, implicit $scc
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S_BRANCH %bb.1
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bb.1:
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%s0c:vgpr_32 = V_ADD_F32_e64 0, %s0a:vgpr_32, 0, %const:vgpr_32, 0, 0, implicit $mode, implicit $exec
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%s0d:vgpr_32 = V_ADD_F32_e64 0, %s0b:vgpr_32, 0, %const:vgpr_32, 0, 0, implicit $mode, implicit $exec
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S_BRANCH %bb.3
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bb.2:
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S_NOP 0
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S_ENDPGM 0
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bb.3:
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%phi0:vgpr_32 = PHI %s0a:vgpr_32, %bb.0, %s0c:vgpr_32, %bb.1
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%phi1:vgpr_32 = PHI %s0b:vgpr_32, %bb.0, %s0d:vgpr_32, %bb.1
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S_BRANCH %bb.4
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bb.4:
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S_ENDPGM 0, implicit %phi0:vgpr_32, implicit %phi1:vgpr_32
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...
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