211 lines
8.9 KiB
LLVM
211 lines
8.9 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc %s -o - -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs | FileCheck --check-prefix=NOHSA-TRAP-GFX900 %s
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; RUN: llc %s -o - -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs | FileCheck --check-prefix=HSA-TRAP-GFX803 %s
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; RUN: llc %s -o - -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs | FileCheck --check-prefix=HSA-TRAP-GFX900 %s
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; RUN: llc %s -o - -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-trap-handler -verify-machineinstrs | FileCheck --check-prefix=HSA-NOTRAP-GFX900 %s
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declare void @llvm.trap() #0
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declare void @llvm.debugtrap() #1
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define amdgpu_kernel void @trap(ptr addrspace(1) nocapture readonly %arg0) {
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; NOHSA-TRAP-GFX900-LABEL: trap:
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; NOHSA-TRAP-GFX900: ; %bb.0:
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; NOHSA-TRAP-GFX900-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
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; NOHSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v0, 0
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; NOHSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v1, 1
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; NOHSA-TRAP-GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; NOHSA-TRAP-GFX900-NEXT: global_store_dword v0, v1, s[0:1]
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; NOHSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; NOHSA-TRAP-GFX900-NEXT: s_endpgm
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;
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; HSA-TRAP-GFX803-LABEL: trap:
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; HSA-TRAP-GFX803: ; %bb.0:
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; HSA-TRAP-GFX803-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v2, 1
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; HSA-TRAP-GFX803-NEXT: s_mov_b64 s[0:1], s[4:5]
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; HSA-TRAP-GFX803-NEXT: s_waitcnt lgkmcnt(0)
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v0, s2
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v1, s3
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; HSA-TRAP-GFX803-NEXT: flat_store_dword v[0:1], v2
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; HSA-TRAP-GFX803-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX803-NEXT: s_trap 2
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;
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; HSA-TRAP-GFX900-LABEL: trap:
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; HSA-TRAP-GFX900: ; %bb.0:
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; HSA-TRAP-GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; HSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v0, 0
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; HSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v1, 1
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; HSA-TRAP-GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; HSA-TRAP-GFX900-NEXT: global_store_dword v0, v1, s[0:1]
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; HSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX900-NEXT: s_trap 2
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;
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; HSA-NOTRAP-GFX900-LABEL: trap:
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; HSA-NOTRAP-GFX900: ; %bb.0:
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; HSA-NOTRAP-GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; HSA-NOTRAP-GFX900-NEXT: v_mov_b32_e32 v0, 0
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; HSA-NOTRAP-GFX900-NEXT: v_mov_b32_e32 v1, 1
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; HSA-NOTRAP-GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; HSA-NOTRAP-GFX900-NEXT: global_store_dword v0, v1, s[0:1]
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; HSA-NOTRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-NOTRAP-GFX900-NEXT: s_endpgm
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store volatile i32 1, ptr addrspace(1) %arg0
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call void @llvm.trap()
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unreachable
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store volatile i32 2, ptr addrspace(1) %arg0
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ret void
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}
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define amdgpu_kernel void @non_entry_trap(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr {
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; NOHSA-TRAP-GFX900-LABEL: non_entry_trap:
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; NOHSA-TRAP-GFX900: ; %bb.0: ; %entry
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; NOHSA-TRAP-GFX900-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
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; NOHSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v0, 0
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; NOHSA-TRAP-GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; NOHSA-TRAP-GFX900-NEXT: global_load_dword v1, v0, s[0:1] glc
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; NOHSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; NOHSA-TRAP-GFX900-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
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; NOHSA-TRAP-GFX900-NEXT: s_cbranch_vccz .LBB1_2
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; NOHSA-TRAP-GFX900-NEXT: ; %bb.1: ; %ret
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; NOHSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v1, 3
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; NOHSA-TRAP-GFX900-NEXT: global_store_dword v0, v1, s[0:1]
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; NOHSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; NOHSA-TRAP-GFX900-NEXT: s_endpgm
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; NOHSA-TRAP-GFX900-NEXT: .LBB1_2: ; %trap
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; NOHSA-TRAP-GFX900-NEXT: s_endpgm
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;
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; HSA-TRAP-GFX803-LABEL: non_entry_trap:
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; HSA-TRAP-GFX803: ; %bb.0: ; %entry
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; HSA-TRAP-GFX803-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
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; HSA-TRAP-GFX803-NEXT: s_waitcnt lgkmcnt(0)
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v0, s0
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v1, s1
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; HSA-TRAP-GFX803-NEXT: flat_load_dword v0, v[0:1] glc
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; HSA-TRAP-GFX803-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX803-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
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; HSA-TRAP-GFX803-NEXT: s_cbranch_vccz .LBB1_2
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; HSA-TRAP-GFX803-NEXT: ; %bb.1: ; %ret
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v0, s0
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v2, 3
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v1, s1
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; HSA-TRAP-GFX803-NEXT: flat_store_dword v[0:1], v2
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; HSA-TRAP-GFX803-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX803-NEXT: s_endpgm
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; HSA-TRAP-GFX803-NEXT: .LBB1_2: ; %trap
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; HSA-TRAP-GFX803-NEXT: s_mov_b64 s[0:1], s[4:5]
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; HSA-TRAP-GFX803-NEXT: s_trap 2
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;
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; HSA-TRAP-GFX900-LABEL: non_entry_trap:
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; HSA-TRAP-GFX900: ; %bb.0: ; %entry
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; HSA-TRAP-GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; HSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v0, 0
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; HSA-TRAP-GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; HSA-TRAP-GFX900-NEXT: global_load_dword v1, v0, s[0:1] glc
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; HSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX900-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
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; HSA-TRAP-GFX900-NEXT: s_cbranch_vccz .LBB1_2
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; HSA-TRAP-GFX900-NEXT: ; %bb.1: ; %ret
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; HSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v1, 3
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; HSA-TRAP-GFX900-NEXT: global_store_dword v0, v1, s[0:1]
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; HSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX900-NEXT: s_endpgm
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; HSA-TRAP-GFX900-NEXT: .LBB1_2: ; %trap
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; HSA-TRAP-GFX900-NEXT: s_trap 2
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;
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; HSA-NOTRAP-GFX900-LABEL: non_entry_trap:
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; HSA-NOTRAP-GFX900: ; %bb.0: ; %entry
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; HSA-NOTRAP-GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; HSA-NOTRAP-GFX900-NEXT: v_mov_b32_e32 v0, 0
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; HSA-NOTRAP-GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; HSA-NOTRAP-GFX900-NEXT: global_load_dword v1, v0, s[0:1] glc
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; HSA-NOTRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-NOTRAP-GFX900-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
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; HSA-NOTRAP-GFX900-NEXT: s_cbranch_vccz .LBB1_2
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; HSA-NOTRAP-GFX900-NEXT: ; %bb.1: ; %ret
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; HSA-NOTRAP-GFX900-NEXT: v_mov_b32_e32 v1, 3
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; HSA-NOTRAP-GFX900-NEXT: global_store_dword v0, v1, s[0:1]
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; HSA-NOTRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-NOTRAP-GFX900-NEXT: s_endpgm
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; HSA-NOTRAP-GFX900-NEXT: .LBB1_2: ; %trap
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; HSA-NOTRAP-GFX900-NEXT: s_endpgm
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entry:
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%tmp29 = load volatile i32, ptr addrspace(1) %arg0
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%cmp = icmp eq i32 %tmp29, -1
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br i1 %cmp, label %ret, label %trap
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trap:
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call void @llvm.trap()
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unreachable
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ret:
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store volatile i32 3, ptr addrspace(1) %arg0
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ret void
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}
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define amdgpu_kernel void @debugtrap(ptr addrspace(1) nocapture readonly %arg0) {
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; NOHSA-TRAP-GFX900-LABEL: debugtrap:
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; NOHSA-TRAP-GFX900: ; %bb.0:
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; NOHSA-TRAP-GFX900-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
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; NOHSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v0, 0
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; NOHSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v1, 1
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; NOHSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v2, 2
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; NOHSA-TRAP-GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; NOHSA-TRAP-GFX900-NEXT: global_store_dword v0, v1, s[0:1]
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; NOHSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; NOHSA-TRAP-GFX900-NEXT: global_store_dword v0, v2, s[0:1]
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; NOHSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; NOHSA-TRAP-GFX900-NEXT: s_endpgm
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;
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; HSA-TRAP-GFX803-LABEL: debugtrap:
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; HSA-TRAP-GFX803: ; %bb.0:
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; HSA-TRAP-GFX803-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v2, 1
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v3, 2
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; HSA-TRAP-GFX803-NEXT: s_waitcnt lgkmcnt(0)
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v0, s0
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; HSA-TRAP-GFX803-NEXT: v_mov_b32_e32 v1, s1
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; HSA-TRAP-GFX803-NEXT: flat_store_dword v[0:1], v2
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; HSA-TRAP-GFX803-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX803-NEXT: s_trap 3
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; HSA-TRAP-GFX803-NEXT: flat_store_dword v[0:1], v3
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; HSA-TRAP-GFX803-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX803-NEXT: s_endpgm
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;
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; HSA-TRAP-GFX900-LABEL: debugtrap:
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; HSA-TRAP-GFX900: ; %bb.0:
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; HSA-TRAP-GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; HSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v0, 0
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; HSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v1, 1
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; HSA-TRAP-GFX900-NEXT: v_mov_b32_e32 v2, 2
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; HSA-TRAP-GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; HSA-TRAP-GFX900-NEXT: global_store_dword v0, v1, s[0:1]
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; HSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX900-NEXT: s_trap 3
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; HSA-TRAP-GFX900-NEXT: global_store_dword v0, v2, s[0:1]
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; HSA-TRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-TRAP-GFX900-NEXT: s_endpgm
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;
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; HSA-NOTRAP-GFX900-LABEL: debugtrap:
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; HSA-NOTRAP-GFX900: ; %bb.0:
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; HSA-NOTRAP-GFX900-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; HSA-NOTRAP-GFX900-NEXT: v_mov_b32_e32 v0, 0
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; HSA-NOTRAP-GFX900-NEXT: v_mov_b32_e32 v1, 1
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; HSA-NOTRAP-GFX900-NEXT: v_mov_b32_e32 v2, 2
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; HSA-NOTRAP-GFX900-NEXT: s_waitcnt lgkmcnt(0)
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; HSA-NOTRAP-GFX900-NEXT: global_store_dword v0, v1, s[0:1]
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; HSA-NOTRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-NOTRAP-GFX900-NEXT: global_store_dword v0, v2, s[0:1]
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; HSA-NOTRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
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; HSA-NOTRAP-GFX900-NEXT: s_endpgm
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store volatile i32 1, ptr addrspace(1) %arg0
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call void @llvm.debugtrap()
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store volatile i32 2, ptr addrspace(1) %arg0
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ret void
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}
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attributes #0 = { nounwind noreturn }
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attributes #1 = { nounwind }
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"amdgpu_code_object_version", i32 400}
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