113 lines
3.3 KiB
LLVM
113 lines
3.3 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=thumbv7m-none-eabi -mattr=v7 | FileCheck %s --check-prefixes=CHECK
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declare i16 @llvm.bswap.i16(i16) readnone
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declare i32 @llvm.bswap.i32(i32) readnone
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declare i32 @llvm.bitreverse.i32(i32) readnone
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define i32 @brev_and_lhs_brev32(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: brev_and_lhs_brev32:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: rbit r0, r0
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; CHECK-NEXT: ands r0, r1
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; CHECK-NEXT: rbit r0, r0
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; CHECK-NEXT: bx lr
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%1 = tail call i32 @llvm.bitreverse.i32(i32 %a)
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%2 = and i32 %1, %b
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%3 = tail call i32 @llvm.bitreverse.i32(i32 %2)
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ret i32 %3
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}
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define i32 @brev_or_lhs_brev32(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: brev_or_lhs_brev32:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: rbit r0, r0
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; CHECK-NEXT: orrs r0, r1
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; CHECK-NEXT: rbit r0, r0
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; CHECK-NEXT: bx lr
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%1 = tail call i32 @llvm.bitreverse.i32(i32 %a)
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%2 = or i32 %1, %b
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%3 = tail call i32 @llvm.bitreverse.i32(i32 %2)
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ret i32 %3
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}
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define i32 @brev_xor_rhs_brev32(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: brev_xor_rhs_brev32:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: rbit r1, r1
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; CHECK-NEXT: eors r0, r1
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; CHECK-NEXT: rbit r0, r0
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; CHECK-NEXT: bx lr
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%1 = tail call i32 @llvm.bitreverse.i32(i32 %b)
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%2 = xor i32 %a, %1
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%3 = tail call i32 @llvm.bitreverse.i32(i32 %2)
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ret i32 %3
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}
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define i32 @brev_and_all_operand_multiuse(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: brev_and_all_operand_multiuse:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: rbit r1, r1
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; CHECK-NEXT: rbit r0, r0
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; CHECK-NEXT: and.w r2, r0, r1
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; CHECK-NEXT: rbit r2, r2
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; CHECK-NEXT: muls r0, r2, r0
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; CHECK-NEXT: muls r0, r1, r0
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; CHECK-NEXT: bx lr
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%1 = tail call i32 @llvm.bitreverse.i32(i32 %a)
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%2 = tail call i32 @llvm.bitreverse.i32(i32 %b)
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%3 = and i32 %1, %2
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%4 = tail call i32 @llvm.bitreverse.i32(i32 %3)
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%5 = mul i32 %1, %4 ;increase use of left bitreverse
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%6 = mul i32 %2, %5 ;increase use of right bitreverse
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ret i32 %6
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}
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; negative test
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define i32 @brev_and_rhs_brev32_multiuse1(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: brev_and_rhs_brev32_multiuse1:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: rbit r1, r1
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; CHECK-NEXT: ands r0, r1
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; CHECK-NEXT: rbit r1, r0
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; CHECK-NEXT: muls r0, r1, r0
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; CHECK-NEXT: bx lr
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%1 = tail call i32 @llvm.bitreverse.i32(i32 %b)
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%2 = and i32 %1, %a
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%3 = tail call i32 @llvm.bitreverse.i32(i32 %2)
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%4 = mul i32 %2, %3 ;increase use of logical op
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ret i32 %4
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}
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; negative test
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define i32 @brev_and_rhs_brev32_multiuse2(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: brev_and_rhs_brev32_multiuse2:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: rbit r1, r1
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; CHECK-NEXT: ands r0, r1
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; CHECK-NEXT: rbit r0, r0
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; CHECK-NEXT: muls r0, r1, r0
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; CHECK-NEXT: bx lr
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%1 = tail call i32 @llvm.bitreverse.i32(i32 %b)
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%2 = and i32 %1, %a
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%3 = tail call i32 @llvm.bitreverse.i32(i32 %2)
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%4 = mul i32 %1, %3 ;increase use of inner bitreverse
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ret i32 %4
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}
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; negative test
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define i32 @brev_xor_rhs_bs32(i32 %a, i32 %b) #0 {
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; CHECK-LABEL: brev_xor_rhs_bs32:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: rev r1, r1
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; CHECK-NEXT: eors r0, r1
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; CHECK-NEXT: rbit r0, r0
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; CHECK-NEXT: bx lr
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%1 = tail call i32 @llvm.bswap.i32(i32 %b)
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%2 = xor i32 %a, %1
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%3 = tail call i32 @llvm.bitreverse.i32(i32 %2)
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ret i32 %3
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}
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