301 lines
6 KiB
LLVM
301 lines
6 KiB
LLVM
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; RUN: llc < %s -march=avr | FileCheck %s
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; RUN: llc < %s -mtriple=avr -mcpu=attiny10 | FileCheck --check-prefix=TINY %s
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declare void @f1(i8)
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declare void @f2(i8)
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define void @cmp8(i8 %a, i8 %b) {
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; CHECK-LABEL: cmp8:
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; CHECK: cp
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; CHECK-NOT: cpc
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%cmp = icmp eq i8 %a, %b
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f1(i8 %a)
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br label %if.end
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if.else:
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tail call void @f2(i8 %b)
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br label %if.end
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if.end:
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ret void
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}
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declare void @f3(i16)
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declare void @f4(i16)
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define void @cmp16(i16 %a, i16 %b) {
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; CHECK-LABEL: cmp16:
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; CHECK: cp
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; CHECK-NEXT: cpc
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%cmp = icmp eq i16 %a, %b
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f3(i16 %a)
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br label %if.end
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if.else:
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tail call void @f4(i16 %b)
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br label %if.end
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if.end:
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ret void
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}
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define void @cmpimm16(i16 %a) {
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; CHECK-LABEL: cmpimm16:
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; CHECK: cpi
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; CHECK-NEXT: cpc
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%cmp = icmp eq i16 %a, 4567
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f3(i16 %a)
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br label %if.end
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if.else:
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tail call void @f4(i16 %a)
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br label %if.end
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if.end:
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ret void
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}
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declare void @f5(i32)
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declare void @f6(i32)
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define void @cmp32(i32 %a, i32 %b) {
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; CHECK-LABEL: cmp32:
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; CHECK: cp
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f5(i32 %a)
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br label %if.end
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if.else:
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tail call void @f6(i32 %b)
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br label %if.end
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if.end:
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ret void
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}
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define void @cmpimm32(i32 %a) {
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; CHECK-LABEL: cmpimm32:
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; CHECK: cpi
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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%cmp = icmp eq i32 %a, 6789343
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f5(i32 %a)
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br label %if.end
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if.else:
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tail call void @f6(i32 %a)
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br label %if.end
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if.end:
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ret void
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}
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declare void @f7(i64)
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declare void @f8(i64)
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define void @cmp64(i64 %a, i64 %b) {
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; CHECK-LABEL: cmp64:
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; CHECK: cp
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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%cmp = icmp eq i64 %a, %b
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f7(i64 %a)
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br label %if.end
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if.else:
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tail call void @f8(i64 %b)
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br label %if.end
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if.end:
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ret void
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}
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define void @cmpimm64(i64 %a) {
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; CHECK-LABEL: cmpimm64:
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; CHECK: cpi
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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; CHECK-NEXT: cpc
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%cmp = icmp eq i64 %a, 234566452
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f7(i64 %a)
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br label %if.end
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if.else:
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tail call void @f8(i64 %a)
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br label %if.end
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if.end:
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ret void
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}
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declare void @f9()
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declare void @f10()
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define void @tst8(i8 %a) {
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; CHECK-LABEL: tst8:
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; CHECK: tst r24
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; CHECK-NEXT: brmi
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%cmp = icmp sgt i8 %a, -1
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f9()
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br label %if.end
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if.else:
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tail call void @f10()
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br label %if.end
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if.end:
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ret void
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}
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define void @tst16(i16 %a) {
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; CHECK-LABEL: tst16:
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; CHECK: tst r25
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; CHECK-NEXT: brmi
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%cmp = icmp sgt i16 %a, -1
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f9()
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br label %if.end
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if.else:
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tail call void @f10()
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br label %if.end
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if.end:
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ret void
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}
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define void @tst32(i32 %a) {
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; CHECK-LABEL: tst32:
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; CHECK: tst r25
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; CHECK-NEXT: brmi
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%cmp = icmp sgt i32 %a, -1
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f9()
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br label %if.end
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if.else:
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tail call void @f10()
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br label %if.end
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if.end:
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ret void
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}
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define void @tst64(i64 %a) {
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; CHECK-LABEL: tst64:
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; CHECK: tst r25
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; CHECK-NEXT: brmi
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%cmp = icmp sgt i64 %a, -1
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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tail call void @f9()
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br label %if.end
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if.else:
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tail call void @f10()
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br label %if.end
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if.end:
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ret void
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}
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define i16 @cmp_i16_gt_0(i16 %0) {
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; CHECK-LABEL: cmp_i16_gt_0:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldi r18, 1
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; CHECK-NEXT: cp r1, r24
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; CHECK-NEXT: cpc r1, r25
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; CHECK-NEXT: brlt .LBB11_2
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; CHECK-NEXT: ; %bb.1:
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; CHECK-NEXT: mov r18, r1
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; CHECK-NEXT: .LBB11_2:
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; CHECK-NEXT: mov r24, r18
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; CHECK-NEXT: clr r25
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; CHECK-NEXT: ret
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;
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; TINY-LABEL: cmp_i16_gt_0:
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; TINY: ; %bb.0:
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; TINY-NEXT: ldi r20, 1
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; TINY-NEXT: cp r17, r24
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; TINY-NEXT: cpc r17, r25
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; TINY-NEXT: brlt .LBB11_2
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; TINY-NEXT: ; %bb.1:
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; TINY-NEXT: mov r20, r17
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; TINY-NEXT: .LBB11_2:
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; TINY-NEXT: mov r24, r20
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; TINY-NEXT: clr r25
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; TINY-NEXT: ret
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%2 = icmp sgt i16 %0, 0
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%3 = zext i1 %2 to i16
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ret i16 %3
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}
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define i16 @cmp_i16_gt_126(i16 %0) {
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; CHECK-LABEL: cmp_i16_gt_126:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldi r18, 1
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; CHECK-NEXT: cpi r24, 127
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; CHECK-NEXT: cpc r25, r1
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; CHECK-NEXT: brge .LBB12_2
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; CHECK-NEXT: ; %bb.1:
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; CHECK-NEXT: mov r18, r1
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; CHECK-NEXT: .LBB12_2:
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; CHECK-NEXT: mov r24, r18
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; CHECK-NEXT: clr r25
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; CHECK-NEXT: ret
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;
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; TINY-LABEL: cmp_i16_gt_126:
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; TINY: ; %bb.0:
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; TINY-NEXT: ldi r20, 1
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; TINY-NEXT: cpi r24, 127
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; TINY-NEXT: cpc r25, r17
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; TINY-NEXT: brge .LBB12_2
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; TINY-NEXT: ; %bb.1:
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; TINY-NEXT: mov r20, r17
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; TINY-NEXT: .LBB12_2:
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; TINY-NEXT: mov r24, r20
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; TINY-NEXT: clr r25
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; TINY-NEXT: ret
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%2 = icmp sgt i16 %0, 126
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%3 = zext i1 %2 to i16
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ret i16 %3
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}
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define i16 @cmp_i16_gt_1023(i16 %0) {
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; CHECK-LABEL: cmp_i16_gt_1023:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: ldi r19, 4
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; CHECK-NEXT: ldi r18, 1
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; CHECK-NEXT: cp r24, r1
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; CHECK-NEXT: cpc r25, r19
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; CHECK-NEXT: brge .LBB13_2
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; CHECK-NEXT: ; %bb.1:
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; CHECK-NEXT: mov r18, r1
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; CHECK-NEXT: .LBB13_2:
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; CHECK-NEXT: mov r24, r18
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; CHECK-NEXT: clr r25
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; CHECK-NEXT: ret
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;
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; TINY-LABEL: cmp_i16_gt_1023:
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; TINY: ; %bb.0:
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; TINY-NEXT: ldi r21, 4
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; TINY-NEXT: ldi r20, 1
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; TINY-NEXT: cp r24, r17
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; TINY-NEXT: cpc r25, r21
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; TINY-NEXT: brge .LBB13_2
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; TINY-NEXT: ; %bb.1:
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; TINY-NEXT: mov r20, r17
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; TINY-NEXT: .LBB13_2:
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; TINY-NEXT: mov r24, r20
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; TINY-NEXT: clr r25
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; TINY-NEXT: ret
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%2 = icmp sgt i16 %0, 1023
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%3 = zext i1 %2 to i16
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ret i16 %3
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}
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