bolt/deps/llvm-18.1.8/llvm/test/CodeGen/LoongArch/lasx/intrinsic-frint.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

declare <8 x float> @llvm.loongarch.lasx.xvfrintrne.s(<8 x float>)

define <8 x float> @lasx_xvfrintrne_s(<8 x float> %va) nounwind {
; CHECK-LABEL: lasx_xvfrintrne_s:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrintrne.s $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <8 x float> @llvm.loongarch.lasx.xvfrintrne.s(<8 x float> %va)
  ret <8 x float> %res
}

declare <4 x double> @llvm.loongarch.lasx.xvfrintrne.d(<4 x double>)

define <4 x double> @lasx_xvfrintrne_d(<4 x double> %va) nounwind {
; CHECK-LABEL: lasx_xvfrintrne_d:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrintrne.d $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <4 x double> @llvm.loongarch.lasx.xvfrintrne.d(<4 x double> %va)
  ret <4 x double> %res
}

declare <8 x float> @llvm.loongarch.lasx.xvfrintrz.s(<8 x float>)

define <8 x float> @lasx_xvfrintrz_s(<8 x float> %va) nounwind {
; CHECK-LABEL: lasx_xvfrintrz_s:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrintrz.s $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <8 x float> @llvm.loongarch.lasx.xvfrintrz.s(<8 x float> %va)
  ret <8 x float> %res
}

declare <4 x double> @llvm.loongarch.lasx.xvfrintrz.d(<4 x double>)

define <4 x double> @lasx_xvfrintrz_d(<4 x double> %va) nounwind {
; CHECK-LABEL: lasx_xvfrintrz_d:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrintrz.d $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <4 x double> @llvm.loongarch.lasx.xvfrintrz.d(<4 x double> %va)
  ret <4 x double> %res
}

declare <8 x float> @llvm.loongarch.lasx.xvfrintrp.s(<8 x float>)

define <8 x float> @lasx_xvfrintrp_s(<8 x float> %va) nounwind {
; CHECK-LABEL: lasx_xvfrintrp_s:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrintrp.s $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <8 x float> @llvm.loongarch.lasx.xvfrintrp.s(<8 x float> %va)
  ret <8 x float> %res
}

declare <4 x double> @llvm.loongarch.lasx.xvfrintrp.d(<4 x double>)

define <4 x double> @lasx_xvfrintrp_d(<4 x double> %va) nounwind {
; CHECK-LABEL: lasx_xvfrintrp_d:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrintrp.d $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <4 x double> @llvm.loongarch.lasx.xvfrintrp.d(<4 x double> %va)
  ret <4 x double> %res
}

declare <8 x float> @llvm.loongarch.lasx.xvfrintrm.s(<8 x float>)

define <8 x float> @lasx_xvfrintrm_s(<8 x float> %va) nounwind {
; CHECK-LABEL: lasx_xvfrintrm_s:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrintrm.s $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <8 x float> @llvm.loongarch.lasx.xvfrintrm.s(<8 x float> %va)
  ret <8 x float> %res
}

declare <4 x double> @llvm.loongarch.lasx.xvfrintrm.d(<4 x double>)

define <4 x double> @lasx_xvfrintrm_d(<4 x double> %va) nounwind {
; CHECK-LABEL: lasx_xvfrintrm_d:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrintrm.d $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <4 x double> @llvm.loongarch.lasx.xvfrintrm.d(<4 x double> %va)
  ret <4 x double> %res
}

declare <8 x float> @llvm.loongarch.lasx.xvfrint.s(<8 x float>)

define <8 x float> @lasx_xvfrint_s(<8 x float> %va) nounwind {
; CHECK-LABEL: lasx_xvfrint_s:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrint.s $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <8 x float> @llvm.loongarch.lasx.xvfrint.s(<8 x float> %va)
  ret <8 x float> %res
}

declare <4 x double> @llvm.loongarch.lasx.xvfrint.d(<4 x double>)

define <4 x double> @lasx_xvfrint_d(<4 x double> %va) nounwind {
; CHECK-LABEL: lasx_xvfrint_d:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvfrint.d $xr0, $xr0
; CHECK-NEXT:    ret
entry:
  %res = call <4 x double> @llvm.loongarch.lasx.xvfrint.d(<4 x double> %va)
  ret <4 x double> %res
}