51 lines
1.4 KiB
LLVM
51 lines
1.4 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
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declare <16 x i8> @llvm.loongarch.lsx.vclo.b(<16 x i8>)
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define <16 x i8> @lsx_vclo_b(<16 x i8> %va) nounwind {
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; CHECK-LABEL: lsx_vclo_b:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vclo.b $vr0, $vr0
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; CHECK-NEXT: ret
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entry:
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%res = call <16 x i8> @llvm.loongarch.lsx.vclo.b(<16 x i8> %va)
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ret <16 x i8> %res
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}
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declare <8 x i16> @llvm.loongarch.lsx.vclo.h(<8 x i16>)
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define <8 x i16> @lsx_vclo_h(<8 x i16> %va) nounwind {
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; CHECK-LABEL: lsx_vclo_h:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vclo.h $vr0, $vr0
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; CHECK-NEXT: ret
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entry:
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%res = call <8 x i16> @llvm.loongarch.lsx.vclo.h(<8 x i16> %va)
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ret <8 x i16> %res
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}
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declare <4 x i32> @llvm.loongarch.lsx.vclo.w(<4 x i32>)
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define <4 x i32> @lsx_vclo_w(<4 x i32> %va) nounwind {
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; CHECK-LABEL: lsx_vclo_w:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vclo.w $vr0, $vr0
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; CHECK-NEXT: ret
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entry:
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%res = call <4 x i32> @llvm.loongarch.lsx.vclo.w(<4 x i32> %va)
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ret <4 x i32> %res
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}
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declare <2 x i64> @llvm.loongarch.lsx.vclo.d(<2 x i64>)
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define <2 x i64> @lsx_vclo_d(<2 x i64> %va) nounwind {
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; CHECK-LABEL: lsx_vclo_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vclo.d $vr0, $vr0
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; CHECK-NEXT: ret
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entry:
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%res = call <2 x i64> @llvm.loongarch.lsx.vclo.d(<2 x i64> %va)
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ret <2 x i64> %res
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}
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