75 lines
2.1 KiB
LLVM
75 lines
2.1 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
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declare i32 @llvm.loongarch.lsx.bnz.b(<16 x i8>)
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define i32 @lsx_bnz_b(<16 x i8> %va) nounwind {
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; CHECK-LABEL: lsx_bnz_b:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetallnez.b $fcc0, $vr0
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; CHECK-NEXT: bcnez $fcc0, .LBB0_2
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: addi.w $a0, $zero, 0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB0_2: # %entry
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; CHECK-NEXT: addi.w $a0, $zero, 1
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; CHECK-NEXT: ret
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entry:
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%res = call i32 @llvm.loongarch.lsx.bnz.b(<16 x i8> %va)
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ret i32 %res
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}
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declare i32 @llvm.loongarch.lsx.bnz.h(<8 x i16>)
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define i32 @lsx_bnz_h(<8 x i16> %va) nounwind {
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; CHECK-LABEL: lsx_bnz_h:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetallnez.h $fcc0, $vr0
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; CHECK-NEXT: bcnez $fcc0, .LBB1_2
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: addi.w $a0, $zero, 0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB1_2: # %entry
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; CHECK-NEXT: addi.w $a0, $zero, 1
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; CHECK-NEXT: ret
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entry:
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%res = call i32 @llvm.loongarch.lsx.bnz.h(<8 x i16> %va)
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ret i32 %res
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}
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declare i32 @llvm.loongarch.lsx.bnz.w(<4 x i32>)
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define i32 @lsx_bnz_w(<4 x i32> %va) nounwind {
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; CHECK-LABEL: lsx_bnz_w:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetallnez.w $fcc0, $vr0
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; CHECK-NEXT: bcnez $fcc0, .LBB2_2
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: addi.w $a0, $zero, 0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB2_2: # %entry
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; CHECK-NEXT: addi.w $a0, $zero, 1
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; CHECK-NEXT: ret
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entry:
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%res = call i32 @llvm.loongarch.lsx.bnz.w(<4 x i32> %va)
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ret i32 %res
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}
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declare i32 @llvm.loongarch.lsx.bnz.d(<2 x i64>)
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define i32 @lsx_bnz_d(<2 x i64> %va) nounwind {
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; CHECK-LABEL: lsx_bnz_d:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetallnez.d $fcc0, $vr0
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; CHECK-NEXT: bcnez $fcc0, .LBB3_2
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; CHECK-NEXT: # %bb.1: # %entry
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; CHECK-NEXT: addi.w $a0, $zero, 0
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; CHECK-NEXT: ret
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; CHECK-NEXT: .LBB3_2: # %entry
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; CHECK-NEXT: addi.w $a0, $zero, 1
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; CHECK-NEXT: ret
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entry:
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%res = call i32 @llvm.loongarch.lsx.bnz.d(<2 x i64> %va)
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ret i32 %res
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}
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