bolt/deps/llvm-18.1.8/llvm/test/CodeGen/MIR/X86/instr-pcsections.mir

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2025-02-14 19:21:04 +01:00
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser parses pcsections metadata correctly.
--- |
define i8 @test(i8* %a) {
entry:
%0 = load i8, i8* %a, align 1, !pcsections !0
ret i8 %0
}
!0 = !{!"foo"}
...
---
name: test
alignment: 16
tracksRegLiveness: true
liveins:
- { reg: '$rdi' }
frameInfo:
maxAlignment: 1
maxCallFrameSize: 0
machineFunctionInfo: {}
body: |
bb.0.entry:
liveins: $rdi
; CHECK-LABEL: name: test
; CHECK: MOV{{.*}} pcsections !0
renamable $al = MOV8rm killed renamable $rdi, 1, $noreg, 0, $noreg, pcsections !0
RET64 implicit killed $al
...