113 lines
3.2 KiB
LLVM
113 lines
3.2 KiB
LLVM
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; We run nvvm-reflect (and then optimize) this module twice, once with metadata
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; that enables FTZ, and again with metadata that disables it.
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; RUN: cat %s > %t.noftz
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; RUN: echo '!0 = !{i32 4, !"nvvm-reflect-ftz", i32 0}' >> %t.noftz
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; RUN: opt %t.noftz -S -mtriple=nvptx-nvidia-cuda -passes='default<O2>' \
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; RUN: | FileCheck %s --check-prefix=USE_FTZ_0 --check-prefix=CHECK
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; RUN: cat %s > %t.ftz
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; RUN: echo '!0 = !{i32 4, !"nvvm-reflect-ftz", i32 1}' >> %t.ftz
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; RUN: opt %t.ftz -S -mtriple=nvptx-nvidia-cuda -passes='default<O2>' \
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; RUN: | FileCheck %s --check-prefix=USE_FTZ_1 --check-prefix=CHECK
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@str = private unnamed_addr addrspace(4) constant [11 x i8] c"__CUDA_FTZ\00"
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declare i32 @__nvvm_reflect(ptr)
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declare ptr @llvm.nvvm.ptr.constant.to.gen.p0i8.p4i8(ptr addrspace(4))
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; CHECK-LABEL: @foo
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define float @foo(float %a, float %b) {
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; CHECK-NOT: call i32 @__nvvm_reflect
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%ptr = tail call ptr @llvm.nvvm.ptr.constant.to.gen.p0i8.p4i8(ptr addrspace(4) @str)
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%reflect = tail call i32 @__nvvm_reflect(ptr %ptr)
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%cmp = icmp ugt i32 %reflect, 0
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br i1 %cmp, label %use_mul, label %use_add
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use_mul:
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; USE_FTZ_1: fmul float %a, %b
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; USE_FTZ_0-NOT: fadd float %a, %b
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%ret1 = fmul float %a, %b
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br label %exit
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use_add:
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; USE_FTZ_0: fadd float %a, %b
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; USE_FTZ_1-NOT: fmul float %a, %b
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%ret2 = fadd float %a, %b
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br label %exit
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exit:
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%ret = phi float [%ret1, %use_mul], [%ret2, %use_add]
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ret float %ret
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}
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declare i32 @llvm.nvvm.reflect.p0i8(ptr)
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; CHECK-LABEL: define noundef i32 @intrinsic
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define i32 @intrinsic() {
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; CHECK-NOT: call i32 @llvm.nvvm.reflect
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; USE_FTZ_0: ret i32 0
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; USE_FTZ_1: ret i32 1
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%ptr = tail call ptr @llvm.nvvm.ptr.constant.to.gen.p0i8.p4i8(ptr addrspace(4) @str)
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%reflect = tail call i32 @llvm.nvvm.reflect.p0i8(ptr %ptr)
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ret i32 %reflect
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}
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; CUDA-7.0 passes __nvvm_reflect argument slightly differently.
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; Verify that it works, too
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@"$str" = private addrspace(1) constant [11 x i8] c"__CUDA_FTZ\00"
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; CHECK-LABEL: @bar
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define float @bar(float %a, float %b) {
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; CHECK-NOT: call i32 @__nvvm_reflect
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%reflect = call i32 @__nvvm_reflect(ptr addrspacecast (ptr addrspace(1) @"$str" to ptr))
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%cmp = icmp ne i32 %reflect, 0
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br i1 %cmp, label %use_mul, label %use_add
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use_mul:
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; USE_FTZ_1: fmul float %a, %b
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; USE_FTZ_0-NOT: fadd float %a, %b
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%ret1 = fmul float %a, %b
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br label %exit
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use_add:
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; USE_FTZ_0: fadd float %a, %b
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; USE_FTZ_1-NOT: fmul float %a, %b
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%ret2 = fadd float %a, %b
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br label %exit
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exit:
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%ret = phi float [%ret1, %use_mul], [%ret2, %use_add]
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ret float %ret
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}
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@str0 = private constant [11 x i8] c"__CUDA_FTZ\00"
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; CHECK-LABEL: @baz
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define float @baz(float %a, float %b) {
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; CHECK-NOT: call i32 @__nvvm_reflect
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%reflect = call i32 @__nvvm_reflect(ptr @str0)
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%cmp = icmp ne i32 %reflect, 0
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br i1 %cmp, label %use_mul, label %use_add
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use_mul:
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; USE_FTZ_1: fmul float %a, %b
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; USE_FTZ_0-NOT: fadd float %a, %b
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%ret1 = fmul float %a, %b
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br label %exit
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use_add:
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; USE_FTZ_0: fadd float %a, %b
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; USE_FTZ_1-NOT: fmul float %a, %b
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%ret2 = fadd float %a, %b
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br label %exit
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exit:
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%ret = phi float [%ret1, %use_mul], [%ret2, %use_add]
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ret float %ret
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}
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!llvm.module.flags = !{!0}
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; A module flag is added to the end of this file by the RUN lines at the top.
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