345 lines
15 KiB
Text
345 lines
15 KiB
Text
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
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# RUN: | FileCheck %s --check-prefixes=CHECK,RV32I
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# RUN: llc -mtriple=riscv32 -mattr=+zbb -run-pass=legalizer %s -o - \
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# RUN: | FileCheck %s --check-prefixes=CHECK,RV32ZBB_OR_RV32ZBKB
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# RUN: llc -mtriple=riscv32 -mattr=+zbkb -run-pass=legalizer %s -o - \
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# RUN: | FileCheck %s --check-prefixes=CHECK,RV32ZBB_OR_RV32ZBKB
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---
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name: rotl_i8
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body: |
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bb.1:
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liveins: $x10, $x11
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; CHECK-LABEL: name: rotl_i8
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
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; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND]](s32)
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C1]]
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
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; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C2]]
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; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[AND1]](s32)
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; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[LSHR]]
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; CHECK-NEXT: $x10 = COPY [[OR]](s32)
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; CHECK-NEXT: PseudoRET implicit $x10
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%2:_(s32) = COPY $x10
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%0:_(s8) = G_TRUNC %2(s32)
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%3:_(s32) = COPY $x11
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%1:_(s8) = G_TRUNC %3(s32)
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%4:_(s8) = G_ROTL %0, %1(s8)
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%5:_(s32) = G_ANYEXT %4(s8)
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$x10 = COPY %5(s32)
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PseudoRET implicit $x10
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...
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---
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name: rotl_i16
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body: |
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bb.1:
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liveins: $x10, $x11
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; CHECK-LABEL: name: rotl_i16
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 15
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; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND]](s32)
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C1]]
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C2]]
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; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND2]], [[AND1]](s32)
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; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[LSHR]]
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; CHECK-NEXT: $x10 = COPY [[OR]](s32)
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; CHECK-NEXT: PseudoRET implicit $x10
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%2:_(s32) = COPY $x10
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%0:_(s16) = G_TRUNC %2(s32)
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%3:_(s32) = COPY $x11
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%1:_(s16) = G_TRUNC %3(s32)
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%4:_(s16) = G_ROTL %0, %1(s16)
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%5:_(s32) = G_ANYEXT %4(s16)
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$x10 = COPY %5(s32)
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PseudoRET implicit $x10
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...
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---
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name: rotl_i32
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body: |
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bb.1:
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liveins: $x10, $x11
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; RV32I-LABEL: name: rotl_i32
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; RV32I: liveins: $x10, $x11
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; RV32I-NEXT: {{ $}}
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; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; RV32I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; RV32I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
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; RV32I-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
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; RV32I-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
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; RV32I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND]](s32)
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; RV32I-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C1]]
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; RV32I-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[AND1]](s32)
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; RV32I-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[LSHR]]
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; RV32I-NEXT: $x10 = COPY [[OR]](s32)
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; RV32I-NEXT: PseudoRET implicit $x10
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;
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; RV32ZBB_OR_RV32ZBKB-LABEL: name: rotl_i32
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; RV32ZBB_OR_RV32ZBKB: liveins: $x10, $x11
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; RV32ZBB_OR_RV32ZBKB-NEXT: {{ $}}
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; RV32ZBB_OR_RV32ZBKB-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; RV32ZBB_OR_RV32ZBKB-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; RV32ZBB_OR_RV32ZBKB-NEXT: [[ROTL:%[0-9]+]]:_(s32) = G_ROTL [[COPY]], [[COPY1]](s32)
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; RV32ZBB_OR_RV32ZBKB-NEXT: $x10 = COPY [[ROTL]](s32)
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; RV32ZBB_OR_RV32ZBKB-NEXT: PseudoRET implicit $x10
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%0:_(s32) = COPY $x10
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%1:_(s32) = COPY $x11
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%2:_(s32) = G_ROTL %0, %1(s32)
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$x10 = COPY %2(s32)
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PseudoRET implicit $x10
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...
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---
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name: rotl_i64
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body: |
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bb.1:
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liveins: $x10, $x11, $x12, $x13
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; CHECK-LABEL: name: rotl_i64
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; CHECK: liveins: $x10, $x11, $x12, $x13
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 63
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; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
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; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[AND]], [[C2]]
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; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[AND]]
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; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND]](s32), [[C2]]
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; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[AND]](s32), [[C3]]
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND]](s32)
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; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SUB2]](s32)
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; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[AND]](s32)
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; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
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; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[SUB1]](s32)
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; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[SHL]], [[C4]]
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; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[OR]], [[SHL2]]
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; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[ICMP1]](s32), [[COPY1]], [[SELECT1]]
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C1]]
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; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
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; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[AND1]], [[C5]]
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; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C5]], [[AND1]]
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; CHECK-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND1]](s32), [[C5]]
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; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[AND1]](s32), [[C6]]
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; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[AND1]](s32)
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; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[AND1]](s32)
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; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB4]](s32)
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; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR2]], [[SHL3]]
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; CHECK-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[SUB3]](s32)
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; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s32) = G_SELECT [[ICMP2]](s32), [[OR1]], [[LSHR3]]
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; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s32) = G_SELECT [[ICMP3]](s32), [[COPY]], [[SELECT3]]
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; CHECK-NEXT: [[SELECT5:%[0-9]+]]:_(s32) = G_SELECT [[ICMP2]](s32), [[LSHR1]], [[C7]]
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; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[SELECT]], [[SELECT4]]
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; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[SELECT2]], [[SELECT5]]
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; CHECK-NEXT: $x10 = COPY [[OR2]](s32)
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; CHECK-NEXT: $x11 = COPY [[OR3]](s32)
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; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
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%2:_(s32) = COPY $x10
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%3:_(s32) = COPY $x11
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%0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
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%4:_(s32) = COPY $x12
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%5:_(s32) = COPY $x13
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%1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
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%6:_(s64) = G_ROTL %0, %1(s64)
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%7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
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$x10 = COPY %7(s32)
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$x11 = COPY %8(s32)
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PseudoRET implicit $x10, implicit $x11
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...
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---
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name: rotr_i8
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body: |
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bb.1:
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liveins: $x10, $x11
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; CHECK-LABEL: name: rotr_i8
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
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; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C2]]
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; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[AND]](s32)
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; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C1]]
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND2]](s32)
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; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
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; CHECK-NEXT: $x10 = COPY [[OR]](s32)
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; CHECK-NEXT: PseudoRET implicit $x10
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%2:_(s32) = COPY $x10
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%0:_(s8) = G_TRUNC %2(s32)
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%3:_(s32) = COPY $x11
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%1:_(s8) = G_TRUNC %3(s32)
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%4:_(s8) = G_ROTR %0, %1(s8)
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%5:_(s32) = G_ANYEXT %4(s8)
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$x10 = COPY %5(s32)
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PseudoRET implicit $x10
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...
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---
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name: rotr_i16
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body: |
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bb.1:
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liveins: $x10, $x11
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; CHECK-LABEL: name: rotr_i16
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 15
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; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
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; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
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; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C2]]
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; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], [[AND]](s32)
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; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C1]]
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; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND2]](s32)
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; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
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; CHECK-NEXT: $x10 = COPY [[OR]](s32)
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; CHECK-NEXT: PseudoRET implicit $x10
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%2:_(s32) = COPY $x10
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%0:_(s16) = G_TRUNC %2(s32)
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%3:_(s32) = COPY $x11
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%1:_(s16) = G_TRUNC %3(s32)
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%4:_(s16) = G_ROTR %0, %1(s16)
|
||
|
|
%5:_(s32) = G_ANYEXT %4(s16)
|
||
|
|
$x10 = COPY %5(s32)
|
||
|
|
PseudoRET implicit $x10
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: rotr_i32
|
||
|
|
body: |
|
||
|
|
bb.1:
|
||
|
|
liveins: $x10, $x11
|
||
|
|
|
||
|
|
; RV32I-LABEL: name: rotr_i32
|
||
|
|
; RV32I: liveins: $x10, $x11
|
||
|
|
; RV32I-NEXT: {{ $}}
|
||
|
|
; RV32I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
|
||
|
|
; RV32I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
|
||
|
|
; RV32I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||
|
|
; RV32I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
|
||
|
|
; RV32I-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY1]]
|
||
|
|
; RV32I-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
|
||
|
|
; RV32I-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[AND]](s32)
|
||
|
|
; RV32I-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C1]]
|
||
|
|
; RV32I-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND1]](s32)
|
||
|
|
; RV32I-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
|
||
|
|
; RV32I-NEXT: $x10 = COPY [[OR]](s32)
|
||
|
|
; RV32I-NEXT: PseudoRET implicit $x10
|
||
|
|
;
|
||
|
|
; RV32ZBB_OR_RV32ZBKB-LABEL: name: rotr_i32
|
||
|
|
; RV32ZBB_OR_RV32ZBKB: liveins: $x10, $x11
|
||
|
|
; RV32ZBB_OR_RV32ZBKB-NEXT: {{ $}}
|
||
|
|
; RV32ZBB_OR_RV32ZBKB-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
|
||
|
|
; RV32ZBB_OR_RV32ZBKB-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
|
||
|
|
; RV32ZBB_OR_RV32ZBKB-NEXT: [[ROTR:%[0-9]+]]:_(s32) = G_ROTR [[COPY]], [[COPY1]](s32)
|
||
|
|
; RV32ZBB_OR_RV32ZBKB-NEXT: $x10 = COPY [[ROTR]](s32)
|
||
|
|
; RV32ZBB_OR_RV32ZBKB-NEXT: PseudoRET implicit $x10
|
||
|
|
%0:_(s32) = COPY $x10
|
||
|
|
%1:_(s32) = COPY $x11
|
||
|
|
%2:_(s32) = G_ROTR %0, %1(s32)
|
||
|
|
$x10 = COPY %2(s32)
|
||
|
|
PseudoRET implicit $x10
|
||
|
|
|
||
|
|
...
|
||
|
|
---
|
||
|
|
name: rotr_i64
|
||
|
|
body: |
|
||
|
|
bb.1:
|
||
|
|
liveins: $x10, $x11, $x12, $x13
|
||
|
|
|
||
|
|
; CHECK-LABEL: name: rotr_i64
|
||
|
|
; CHECK: liveins: $x10, $x11, $x12, $x13
|
||
|
|
; CHECK-NEXT: {{ $}}
|
||
|
|
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
|
||
|
|
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
|
||
|
|
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x12
|
||
|
|
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||
|
|
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 63
|
||
|
|
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]
|
||
|
|
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C1]]
|
||
|
|
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
|
||
|
|
; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[AND]], [[C2]]
|
||
|
|
; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[AND]]
|
||
|
|
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||
|
|
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND]](s32), [[C2]]
|
||
|
|
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[AND]](s32), [[C3]]
|
||
|
|
; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[AND]](s32)
|
||
|
|
; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[AND]](s32)
|
||
|
|
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB2]](s32)
|
||
|
|
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL]]
|
||
|
|
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||
|
|
; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[SUB1]](s32)
|
||
|
|
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[OR]], [[LSHR2]]
|
||
|
|
; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ICMP1]](s32), [[COPY]], [[SELECT]]
|
||
|
|
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[LSHR]], [[C4]]
|
||
|
|
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C1]]
|
||
|
|
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
|
||
|
|
; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[AND1]], [[C5]]
|
||
|
|
; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[C5]], [[AND1]]
|
||
|
|
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||
|
|
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[AND1]](s32), [[C5]]
|
||
|
|
; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[AND1]](s32), [[C6]]
|
||
|
|
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND1]](s32)
|
||
|
|
; CHECK-NEXT: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SUB4]](s32)
|
||
|
|
; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[AND1]](s32)
|
||
|
|
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR3]], [[SHL2]]
|
||
|
|
; CHECK-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||
|
|
; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[SUB3]](s32)
|
||
|
|
; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s32) = G_SELECT [[ICMP2]](s32), [[SHL1]], [[C7]]
|
||
|
|
; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s32) = G_SELECT [[ICMP2]](s32), [[OR1]], [[SHL3]]
|
||
|
|
; CHECK-NEXT: [[SELECT5:%[0-9]+]]:_(s32) = G_SELECT [[ICMP3]](s32), [[COPY1]], [[SELECT4]]
|
||
|
|
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[SELECT1]], [[SELECT3]]
|
||
|
|
; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[SELECT2]], [[SELECT5]]
|
||
|
|
; CHECK-NEXT: $x10 = COPY [[OR2]](s32)
|
||
|
|
; CHECK-NEXT: $x11 = COPY [[OR3]](s32)
|
||
|
|
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
|
||
|
|
%2:_(s32) = COPY $x10
|
||
|
|
%3:_(s32) = COPY $x11
|
||
|
|
%0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)
|
||
|
|
%4:_(s32) = COPY $x12
|
||
|
|
%5:_(s32) = COPY $x13
|
||
|
|
%1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)
|
||
|
|
%6:_(s64) = G_ROTR %0, %1(s64)
|
||
|
|
%7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)
|
||
|
|
$x10 = COPY %7(s32)
|
||
|
|
$x11 = COPY %8(s32)
|
||
|
|
PseudoRET implicit $x10, implicit $x11
|
||
|
|
|
||
|
|
...
|