613 lines
20 KiB
LLVM
613 lines
20 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfbfmin -verify-machineinstrs \
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; RUN: -target-abi ilp32f < %s | FileCheck -check-prefix=RV32IZFBFMIN %s
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; RUN: llc -mtriple=riscv64 -mattr=+experimental-zfbfmin -verify-machineinstrs \
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; RUN: -target-abi lp64f < %s | FileCheck -check-prefix=RV64IZFBFMIN %s
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declare void @abort()
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declare void @exit(i32)
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declare bfloat @dummy(bfloat)
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define void @br_fcmp_false(bfloat %a, bfloat %b) nounwind {
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; RV32IZFBFMIN-LABEL: br_fcmp_false:
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; RV32IZFBFMIN: # %bb.0:
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; RV32IZFBFMIN-NEXT: li a0, 1
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; RV32IZFBFMIN-NEXT: bnez a0, .LBB0_2
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; RV32IZFBFMIN-NEXT: # %bb.1: # %if.then
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; RV32IZFBFMIN-NEXT: ret
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; RV32IZFBFMIN-NEXT: .LBB0_2: # %if.else
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; RV32IZFBFMIN-NEXT: addi sp, sp, -16
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; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32IZFBFMIN-NEXT: call abort
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;
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; RV64IZFBFMIN-LABEL: br_fcmp_false:
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; RV64IZFBFMIN: # %bb.0:
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; RV64IZFBFMIN-NEXT: li a0, 1
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; RV64IZFBFMIN-NEXT: bnez a0, .LBB0_2
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; RV64IZFBFMIN-NEXT: # %bb.1: # %if.then
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; RV64IZFBFMIN-NEXT: ret
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; RV64IZFBFMIN-NEXT: .LBB0_2: # %if.else
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; RV64IZFBFMIN-NEXT: addi sp, sp, -16
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; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IZFBFMIN-NEXT: call abort
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%1 = fcmp false bfloat %a, %b
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br i1 %1, label %if.then, label %if.else
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if.then:
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ret void
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if.else:
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tail call void @abort()
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unreachable
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}
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define void @br_fcmp_oeq(bfloat %a, bfloat %b) nounwind {
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; RV32IZFBFMIN-LABEL: br_fcmp_oeq:
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; RV32IZFBFMIN: # %bb.0:
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV32IZFBFMIN-NEXT: feq.s a0, fa4, fa5
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; RV32IZFBFMIN-NEXT: bnez a0, .LBB1_2
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; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV32IZFBFMIN-NEXT: ret
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; RV32IZFBFMIN-NEXT: .LBB1_2: # %if.then
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; RV32IZFBFMIN-NEXT: addi sp, sp, -16
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; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32IZFBFMIN-NEXT: call abort
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;
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; RV64IZFBFMIN-LABEL: br_fcmp_oeq:
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; RV64IZFBFMIN: # %bb.0:
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV64IZFBFMIN-NEXT: feq.s a0, fa4, fa5
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; RV64IZFBFMIN-NEXT: bnez a0, .LBB1_2
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; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV64IZFBFMIN-NEXT: ret
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; RV64IZFBFMIN-NEXT: .LBB1_2: # %if.then
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; RV64IZFBFMIN-NEXT: addi sp, sp, -16
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; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IZFBFMIN-NEXT: call abort
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%1 = fcmp oeq bfloat %a, %b
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br i1 %1, label %if.then, label %if.else
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if.else:
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ret void
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if.then:
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tail call void @abort()
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unreachable
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}
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define void @br_fcmp_oeq_alt(bfloat %a, bfloat %b) nounwind {
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; RV32IZFBFMIN-LABEL: br_fcmp_oeq_alt:
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; RV32IZFBFMIN: # %bb.0:
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV32IZFBFMIN-NEXT: feq.s a0, fa4, fa5
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; RV32IZFBFMIN-NEXT: bnez a0, .LBB2_2
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; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV32IZFBFMIN-NEXT: ret
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; RV32IZFBFMIN-NEXT: .LBB2_2: # %if.then
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; RV32IZFBFMIN-NEXT: addi sp, sp, -16
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; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32IZFBFMIN-NEXT: call abort
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;
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; RV64IZFBFMIN-LABEL: br_fcmp_oeq_alt:
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; RV64IZFBFMIN: # %bb.0:
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV64IZFBFMIN-NEXT: feq.s a0, fa4, fa5
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; RV64IZFBFMIN-NEXT: bnez a0, .LBB2_2
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; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV64IZFBFMIN-NEXT: ret
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; RV64IZFBFMIN-NEXT: .LBB2_2: # %if.then
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; RV64IZFBFMIN-NEXT: addi sp, sp, -16
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; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IZFBFMIN-NEXT: call abort
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%1 = fcmp oeq bfloat %a, %b
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br i1 %1, label %if.then, label %if.else
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if.then:
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tail call void @abort()
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unreachable
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if.else:
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ret void
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}
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define void @br_fcmp_ogt(bfloat %a, bfloat %b) nounwind {
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; RV32IZFBFMIN-LABEL: br_fcmp_ogt:
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; RV32IZFBFMIN: # %bb.0:
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa1
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; RV32IZFBFMIN-NEXT: flt.s a0, fa4, fa5
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; RV32IZFBFMIN-NEXT: bnez a0, .LBB3_2
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; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV32IZFBFMIN-NEXT: ret
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; RV32IZFBFMIN-NEXT: .LBB3_2: # %if.then
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; RV32IZFBFMIN-NEXT: addi sp, sp, -16
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; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32IZFBFMIN-NEXT: call abort
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;
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; RV64IZFBFMIN-LABEL: br_fcmp_ogt:
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; RV64IZFBFMIN: # %bb.0:
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa1
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; RV64IZFBFMIN-NEXT: flt.s a0, fa4, fa5
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; RV64IZFBFMIN-NEXT: bnez a0, .LBB3_2
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; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV64IZFBFMIN-NEXT: ret
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; RV64IZFBFMIN-NEXT: .LBB3_2: # %if.then
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; RV64IZFBFMIN-NEXT: addi sp, sp, -16
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; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IZFBFMIN-NEXT: call abort
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%1 = fcmp ogt bfloat %a, %b
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br i1 %1, label %if.then, label %if.else
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if.else:
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ret void
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if.then:
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tail call void @abort()
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unreachable
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}
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define void @br_fcmp_oge(bfloat %a, bfloat %b) nounwind {
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; RV32IZFBFMIN-LABEL: br_fcmp_oge:
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; RV32IZFBFMIN: # %bb.0:
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa1
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; RV32IZFBFMIN-NEXT: fle.s a0, fa4, fa5
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; RV32IZFBFMIN-NEXT: bnez a0, .LBB4_2
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; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV32IZFBFMIN-NEXT: ret
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; RV32IZFBFMIN-NEXT: .LBB4_2: # %if.then
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; RV32IZFBFMIN-NEXT: addi sp, sp, -16
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; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32IZFBFMIN-NEXT: call abort
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;
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; RV64IZFBFMIN-LABEL: br_fcmp_oge:
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; RV64IZFBFMIN: # %bb.0:
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa1
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; RV64IZFBFMIN-NEXT: fle.s a0, fa4, fa5
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; RV64IZFBFMIN-NEXT: bnez a0, .LBB4_2
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; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV64IZFBFMIN-NEXT: ret
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; RV64IZFBFMIN-NEXT: .LBB4_2: # %if.then
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; RV64IZFBFMIN-NEXT: addi sp, sp, -16
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; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IZFBFMIN-NEXT: call abort
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%1 = fcmp oge bfloat %a, %b
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br i1 %1, label %if.then, label %if.else
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if.else:
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ret void
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if.then:
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tail call void @abort()
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unreachable
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}
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define void @br_fcmp_olt(bfloat %a, bfloat %b) nounwind {
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; RV32IZFBFMIN-LABEL: br_fcmp_olt:
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; RV32IZFBFMIN: # %bb.0:
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV32IZFBFMIN-NEXT: flt.s a0, fa4, fa5
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; RV32IZFBFMIN-NEXT: bnez a0, .LBB5_2
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; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV32IZFBFMIN-NEXT: ret
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; RV32IZFBFMIN-NEXT: .LBB5_2: # %if.then
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; RV32IZFBFMIN-NEXT: addi sp, sp, -16
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; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32IZFBFMIN-NEXT: call abort
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;
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; RV64IZFBFMIN-LABEL: br_fcmp_olt:
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; RV64IZFBFMIN: # %bb.0:
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV64IZFBFMIN-NEXT: flt.s a0, fa4, fa5
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; RV64IZFBFMIN-NEXT: bnez a0, .LBB5_2
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; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV64IZFBFMIN-NEXT: ret
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; RV64IZFBFMIN-NEXT: .LBB5_2: # %if.then
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; RV64IZFBFMIN-NEXT: addi sp, sp, -16
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; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IZFBFMIN-NEXT: call abort
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%1 = fcmp olt bfloat %a, %b
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br i1 %1, label %if.then, label %if.else
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if.else:
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ret void
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if.then:
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tail call void @abort()
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unreachable
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}
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define void @br_fcmp_ole(bfloat %a, bfloat %b) nounwind {
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; RV32IZFBFMIN-LABEL: br_fcmp_ole:
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; RV32IZFBFMIN: # %bb.0:
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV32IZFBFMIN-NEXT: fle.s a0, fa4, fa5
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; RV32IZFBFMIN-NEXT: bnez a0, .LBB6_2
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; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV32IZFBFMIN-NEXT: ret
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; RV32IZFBFMIN-NEXT: .LBB6_2: # %if.then
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; RV32IZFBFMIN-NEXT: addi sp, sp, -16
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; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32IZFBFMIN-NEXT: call abort
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;
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; RV64IZFBFMIN-LABEL: br_fcmp_ole:
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; RV64IZFBFMIN: # %bb.0:
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV64IZFBFMIN-NEXT: fle.s a0, fa4, fa5
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; RV64IZFBFMIN-NEXT: bnez a0, .LBB6_2
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; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV64IZFBFMIN-NEXT: ret
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; RV64IZFBFMIN-NEXT: .LBB6_2: # %if.then
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; RV64IZFBFMIN-NEXT: addi sp, sp, -16
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; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; RV64IZFBFMIN-NEXT: call abort
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%1 = fcmp ole bfloat %a, %b
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br i1 %1, label %if.then, label %if.else
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if.else:
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ret void
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if.then:
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tail call void @abort()
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unreachable
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}
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define void @br_fcmp_one(bfloat %a, bfloat %b) nounwind {
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; RV32IZFBFMIN-LABEL: br_fcmp_one:
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; RV32IZFBFMIN: # %bb.0:
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV32IZFBFMIN-NEXT: flt.s a0, fa4, fa5
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; RV32IZFBFMIN-NEXT: flt.s a1, fa5, fa4
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; RV32IZFBFMIN-NEXT: or a0, a1, a0
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; RV32IZFBFMIN-NEXT: bnez a0, .LBB7_2
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; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
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; RV32IZFBFMIN-NEXT: ret
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; RV32IZFBFMIN-NEXT: .LBB7_2: # %if.then
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; RV32IZFBFMIN-NEXT: addi sp, sp, -16
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; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
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; RV32IZFBFMIN-NEXT: call abort
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;
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; RV64IZFBFMIN-LABEL: br_fcmp_one:
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; RV64IZFBFMIN: # %bb.0:
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
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; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
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; RV64IZFBFMIN-NEXT: flt.s a0, fa4, fa5
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; RV64IZFBFMIN-NEXT: flt.s a1, fa5, fa4
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; RV64IZFBFMIN-NEXT: or a0, a1, a0
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; RV64IZFBFMIN-NEXT: bnez a0, .LBB7_2
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; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
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|
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; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB7_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp one bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @br_fcmp_ord(bfloat %a, bfloat %b) nounwind {
|
||
|
|
; RV32IZFBFMIN-LABEL: br_fcmp_ord:
|
||
|
|
; RV32IZFBFMIN: # %bb.0:
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV32IZFBFMIN-NEXT: feq.s a0, fa5, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
|
||
|
|
; RV32IZFBFMIN-NEXT: feq.s a1, fa5, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: and a0, a1, a0
|
||
|
|
; RV32IZFBFMIN-NEXT: bnez a0, .LBB8_2
|
||
|
|
; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV32IZFBFMIN-NEXT: ret
|
||
|
|
; RV32IZFBFMIN-NEXT: .LBB8_2: # %if.then
|
||
|
|
; RV32IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||
|
|
; RV32IZFBFMIN-NEXT: call abort
|
||
|
|
;
|
||
|
|
; RV64IZFBFMIN-LABEL: br_fcmp_ord:
|
||
|
|
; RV64IZFBFMIN: # %bb.0:
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV64IZFBFMIN-NEXT: feq.s a0, fa5, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
|
||
|
|
; RV64IZFBFMIN-NEXT: feq.s a1, fa5, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: and a0, a1, a0
|
||
|
|
; RV64IZFBFMIN-NEXT: bnez a0, .LBB8_2
|
||
|
|
; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB8_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp ord bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @br_fcmp_ueq(bfloat %a, bfloat %b) nounwind {
|
||
|
|
; RV32IZFBFMIN-LABEL: br_fcmp_ueq:
|
||
|
|
; RV32IZFBFMIN: # %bb.0:
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
|
||
|
|
; RV32IZFBFMIN-NEXT: flt.s a0, fa4, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: flt.s a1, fa5, fa4
|
||
|
|
; RV32IZFBFMIN-NEXT: or a0, a1, a0
|
||
|
|
; RV32IZFBFMIN-NEXT: beqz a0, .LBB9_2
|
||
|
|
; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV32IZFBFMIN-NEXT: ret
|
||
|
|
; RV32IZFBFMIN-NEXT: .LBB9_2: # %if.then
|
||
|
|
; RV32IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||
|
|
; RV32IZFBFMIN-NEXT: call abort
|
||
|
|
;
|
||
|
|
; RV64IZFBFMIN-LABEL: br_fcmp_ueq:
|
||
|
|
; RV64IZFBFMIN: # %bb.0:
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
|
||
|
|
; RV64IZFBFMIN-NEXT: flt.s a0, fa4, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: flt.s a1, fa5, fa4
|
||
|
|
; RV64IZFBFMIN-NEXT: or a0, a1, a0
|
||
|
|
; RV64IZFBFMIN-NEXT: beqz a0, .LBB9_2
|
||
|
|
; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB9_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp ueq bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @br_fcmp_ugt(bfloat %a, bfloat %b) nounwind {
|
||
|
|
; RV32IZFBFMIN-LABEL: br_fcmp_ugt:
|
||
|
|
; RV32IZFBFMIN: # %bb.0:
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
|
||
|
|
; RV32IZFBFMIN-NEXT: fle.s a0, fa4, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: beqz a0, .LBB10_2
|
||
|
|
; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV32IZFBFMIN-NEXT: ret
|
||
|
|
; RV32IZFBFMIN-NEXT: .LBB10_2: # %if.then
|
||
|
|
; RV32IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||
|
|
; RV32IZFBFMIN-NEXT: call abort
|
||
|
|
;
|
||
|
|
; RV64IZFBFMIN-LABEL: br_fcmp_ugt:
|
||
|
|
; RV64IZFBFMIN: # %bb.0:
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
|
||
|
|
; RV64IZFBFMIN-NEXT: fle.s a0, fa4, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: beqz a0, .LBB10_2
|
||
|
|
; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB10_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp ugt bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @br_fcmp_uge(bfloat %a, bfloat %b) nounwind {
|
||
|
|
; RV32IZFBFMIN-LABEL: br_fcmp_uge:
|
||
|
|
; RV32IZFBFMIN: # %bb.0:
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
|
||
|
|
; RV32IZFBFMIN-NEXT: flt.s a0, fa4, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: beqz a0, .LBB11_2
|
||
|
|
; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV32IZFBFMIN-NEXT: ret
|
||
|
|
; RV32IZFBFMIN-NEXT: .LBB11_2: # %if.then
|
||
|
|
; RV32IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||
|
|
; RV32IZFBFMIN-NEXT: call abort
|
||
|
|
;
|
||
|
|
; RV64IZFBFMIN-LABEL: br_fcmp_uge:
|
||
|
|
; RV64IZFBFMIN: # %bb.0:
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
|
||
|
|
; RV64IZFBFMIN-NEXT: flt.s a0, fa4, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: beqz a0, .LBB11_2
|
||
|
|
; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB11_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp uge bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @br_fcmp_ult(bfloat %a, bfloat %b) nounwind {
|
||
|
|
; RV32IZFBFMIN-LABEL: br_fcmp_ult:
|
||
|
|
; RV32IZFBFMIN: # %bb.0:
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa1
|
||
|
|
; RV32IZFBFMIN-NEXT: fle.s a0, fa4, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: beqz a0, .LBB12_2
|
||
|
|
; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV32IZFBFMIN-NEXT: ret
|
||
|
|
; RV32IZFBFMIN-NEXT: .LBB12_2: # %if.then
|
||
|
|
; RV32IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||
|
|
; RV32IZFBFMIN-NEXT: call abort
|
||
|
|
;
|
||
|
|
; RV64IZFBFMIN-LABEL: br_fcmp_ult:
|
||
|
|
; RV64IZFBFMIN: # %bb.0:
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa1
|
||
|
|
; RV64IZFBFMIN-NEXT: fle.s a0, fa4, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: beqz a0, .LBB12_2
|
||
|
|
; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB12_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp ult bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @br_fcmp_ule(bfloat %a, bfloat %b) nounwind {
|
||
|
|
; RV32IZFBFMIN-LABEL: br_fcmp_ule:
|
||
|
|
; RV32IZFBFMIN: # %bb.0:
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa1
|
||
|
|
; RV32IZFBFMIN-NEXT: flt.s a0, fa4, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: beqz a0, .LBB13_2
|
||
|
|
; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV32IZFBFMIN-NEXT: ret
|
||
|
|
; RV32IZFBFMIN-NEXT: .LBB13_2: # %if.then
|
||
|
|
; RV32IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||
|
|
; RV32IZFBFMIN-NEXT: call abort
|
||
|
|
;
|
||
|
|
; RV64IZFBFMIN-LABEL: br_fcmp_ule:
|
||
|
|
; RV64IZFBFMIN: # %bb.0:
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa1
|
||
|
|
; RV64IZFBFMIN-NEXT: flt.s a0, fa4, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: beqz a0, .LBB13_2
|
||
|
|
; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB13_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp ule bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @br_fcmp_une(bfloat %a, bfloat %b) nounwind {
|
||
|
|
; RV32IZFBFMIN-LABEL: br_fcmp_une:
|
||
|
|
; RV32IZFBFMIN: # %bb.0:
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
|
||
|
|
; RV32IZFBFMIN-NEXT: feq.s a0, fa4, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: beqz a0, .LBB14_2
|
||
|
|
; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV32IZFBFMIN-NEXT: ret
|
||
|
|
; RV32IZFBFMIN-NEXT: .LBB14_2: # %if.then
|
||
|
|
; RV32IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||
|
|
; RV32IZFBFMIN-NEXT: call abort
|
||
|
|
;
|
||
|
|
; RV64IZFBFMIN-LABEL: br_fcmp_une:
|
||
|
|
; RV64IZFBFMIN: # %bb.0:
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa4, fa0
|
||
|
|
; RV64IZFBFMIN-NEXT: feq.s a0, fa4, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: beqz a0, .LBB14_2
|
||
|
|
; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB14_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp une bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @br_fcmp_uno(bfloat %a, bfloat %b) nounwind {
|
||
|
|
; RV32IZFBFMIN-LABEL: br_fcmp_uno:
|
||
|
|
; RV32IZFBFMIN: # %bb.0:
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV32IZFBFMIN-NEXT: feq.s a0, fa5, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
|
||
|
|
; RV32IZFBFMIN-NEXT: feq.s a1, fa5, fa5
|
||
|
|
; RV32IZFBFMIN-NEXT: and a0, a1, a0
|
||
|
|
; RV32IZFBFMIN-NEXT: beqz a0, .LBB15_2
|
||
|
|
; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV32IZFBFMIN-NEXT: ret
|
||
|
|
; RV32IZFBFMIN-NEXT: .LBB15_2: # %if.then
|
||
|
|
; RV32IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||
|
|
; RV32IZFBFMIN-NEXT: call abort
|
||
|
|
;
|
||
|
|
; RV64IZFBFMIN-LABEL: br_fcmp_uno:
|
||
|
|
; RV64IZFBFMIN: # %bb.0:
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa1
|
||
|
|
; RV64IZFBFMIN-NEXT: feq.s a0, fa5, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: fcvt.s.bf16 fa5, fa0
|
||
|
|
; RV64IZFBFMIN-NEXT: feq.s a1, fa5, fa5
|
||
|
|
; RV64IZFBFMIN-NEXT: and a0, a1, a0
|
||
|
|
; RV64IZFBFMIN-NEXT: beqz a0, .LBB15_2
|
||
|
|
; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB15_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp uno bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @br_fcmp_true(bfloat %a, bfloat %b) nounwind {
|
||
|
|
; RV32IZFBFMIN-LABEL: br_fcmp_true:
|
||
|
|
; RV32IZFBFMIN: # %bb.0:
|
||
|
|
; RV32IZFBFMIN-NEXT: li a0, 1
|
||
|
|
; RV32IZFBFMIN-NEXT: bnez a0, .LBB16_2
|
||
|
|
; RV32IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV32IZFBFMIN-NEXT: ret
|
||
|
|
; RV32IZFBFMIN-NEXT: .LBB16_2: # %if.then
|
||
|
|
; RV32IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV32IZFBFMIN-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
|
||
|
|
; RV32IZFBFMIN-NEXT: call abort
|
||
|
|
;
|
||
|
|
; RV64IZFBFMIN-LABEL: br_fcmp_true:
|
||
|
|
; RV64IZFBFMIN: # %bb.0:
|
||
|
|
; RV64IZFBFMIN-NEXT: li a0, 1
|
||
|
|
; RV64IZFBFMIN-NEXT: bnez a0, .LBB16_2
|
||
|
|
; RV64IZFBFMIN-NEXT: # %bb.1: # %if.else
|
||
|
|
; RV64IZFBFMIN-NEXT: ret
|
||
|
|
; RV64IZFBFMIN-NEXT: .LBB16_2: # %if.then
|
||
|
|
; RV64IZFBFMIN-NEXT: addi sp, sp, -16
|
||
|
|
; RV64IZFBFMIN-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
|
||
|
|
; RV64IZFBFMIN-NEXT: call abort
|
||
|
|
%1 = fcmp true bfloat %a, %b
|
||
|
|
br i1 %1, label %if.then, label %if.else
|
||
|
|
if.else:
|
||
|
|
ret void
|
||
|
|
if.then:
|
||
|
|
tail call void @abort()
|
||
|
|
unreachable
|
||
|
|
}
|