386 lines
12 KiB
LLVM
386 lines
12 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-macosx10.9 -verify-machineinstrs -mattr=cx16 | FileCheck %s
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; Codegen of i128 without cx16 is tested in atomic-nocx16.ll
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@var = global i128 0
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; Due to the scheduling right after isel for cmpxchg and given the
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; machine scheduler and copy coalescer do not mess up with physical
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; register live-ranges, we end up with a useless copy.
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define i128 @val_compare_and_swap(ptr %p, i128 %oldval, i128 %newval) {
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; CHECK-LABEL: val_compare_and_swap:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rcx, %rbx
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; CHECK-NEXT: movq %rsi, %rax
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%pair = cmpxchg ptr %p, i128 %oldval, i128 %newval acquire acquire
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%val = extractvalue { i128, i1 } %pair, 0
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ret i128 %val
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}
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@cmpxchg16b_global = external dso_local global { i128, i128 }, align 16
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;; Make sure we retain the offset of the global variable.
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define void @cmpxchg16b_global_with_offset() nounwind {
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; CHECK-LABEL: cmpxchg16b_global_with_offset:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: xorl %ebx, %ebx
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; CHECK-NEXT: lock cmpxchg16b _cmpxchg16b_global+16(%rip)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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entry:
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%0 = load atomic i128, ptr getelementptr inbounds ({i128, i128}, ptr @cmpxchg16b_global, i64 0, i32 1) acquire, align 16
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ret void
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}
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define void @fetch_and_nand(ptr %p, i128 %bits) {
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; CHECK-LABEL: fetch_and_nand:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdx, %r8
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB2_1: ## %atomicrmw.start
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; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movq %rdx, %rcx
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; CHECK-NEXT: andq %r8, %rcx
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: andq %rsi, %rbx
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; CHECK-NEXT: notq %rbx
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; CHECK-NEXT: notq %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne LBB2_1
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; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
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; CHECK-NEXT: movq %rax, _var(%rip)
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; CHECK-NEXT: movq %rdx, _var+8(%rip)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%val = atomicrmw nand ptr %p, i128 %bits release
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store i128 %val, ptr @var, align 16
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ret void
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}
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define void @fetch_and_or(ptr %p, i128 %bits) {
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; CHECK-LABEL: fetch_and_or:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdx, %r8
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB3_1: ## %atomicrmw.start
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; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: orq %rsi, %rbx
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; CHECK-NEXT: movq %rdx, %rcx
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; CHECK-NEXT: orq %r8, %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne LBB3_1
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; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
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; CHECK-NEXT: movq %rax, _var(%rip)
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; CHECK-NEXT: movq %rdx, _var+8(%rip)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%val = atomicrmw or ptr %p, i128 %bits seq_cst
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store i128 %val, ptr @var, align 16
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ret void
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}
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define void @fetch_and_add(ptr %p, i128 %bits) {
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; CHECK-LABEL: fetch_and_add:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdx, %r8
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB4_1: ## %atomicrmw.start
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; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: addq %rsi, %rbx
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; CHECK-NEXT: movq %rdx, %rcx
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; CHECK-NEXT: adcq %r8, %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne LBB4_1
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; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
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; CHECK-NEXT: movq %rax, _var(%rip)
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; CHECK-NEXT: movq %rdx, _var+8(%rip)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%val = atomicrmw add ptr %p, i128 %bits seq_cst
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store i128 %val, ptr @var, align 16
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ret void
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}
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define void @fetch_and_sub(ptr %p, i128 %bits) {
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; CHECK-LABEL: fetch_and_sub:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdx, %r8
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB5_1: ## %atomicrmw.start
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; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: movq %rax, %rbx
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; CHECK-NEXT: subq %rsi, %rbx
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; CHECK-NEXT: movq %rdx, %rcx
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; CHECK-NEXT: sbbq %r8, %rcx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne LBB5_1
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; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
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; CHECK-NEXT: movq %rax, _var(%rip)
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; CHECK-NEXT: movq %rdx, _var+8(%rip)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%val = atomicrmw sub ptr %p, i128 %bits seq_cst
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store i128 %val, ptr @var, align 16
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ret void
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}
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define void @fetch_and_min(ptr %p, i128 %bits) {
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; CHECK-LABEL: fetch_and_min:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdx, %r8
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB6_1: ## %atomicrmw.start
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; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: cmpq %rax, %rsi
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: sbbq %rdx, %rcx
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: cmovgeq %rdx, %rcx
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; CHECK-NEXT: movq %rsi, %rbx
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; CHECK-NEXT: cmovgeq %rax, %rbx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne LBB6_1
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; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
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; CHECK-NEXT: movq %rax, _var(%rip)
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; CHECK-NEXT: movq %rdx, _var+8(%rip)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%val = atomicrmw min ptr %p, i128 %bits seq_cst
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store i128 %val, ptr @var, align 16
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ret void
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}
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define void @fetch_and_max(ptr %p, i128 %bits) {
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; CHECK-LABEL: fetch_and_max:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdx, %r8
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB7_1: ## %atomicrmw.start
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; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: cmpq %rax, %rsi
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: sbbq %rdx, %rcx
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: cmovlq %rdx, %rcx
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; CHECK-NEXT: movq %rsi, %rbx
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; CHECK-NEXT: cmovlq %rax, %rbx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne LBB7_1
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; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
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; CHECK-NEXT: movq %rax, _var(%rip)
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; CHECK-NEXT: movq %rdx, _var+8(%rip)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%val = atomicrmw max ptr %p, i128 %bits seq_cst
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store i128 %val, ptr @var, align 16
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ret void
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}
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define void @fetch_and_umin(ptr %p, i128 %bits) {
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; CHECK-LABEL: fetch_and_umin:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdx, %r8
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB8_1: ## %atomicrmw.start
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; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: cmpq %rax, %rsi
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: sbbq %rdx, %rcx
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: cmovaeq %rdx, %rcx
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; CHECK-NEXT: movq %rsi, %rbx
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; CHECK-NEXT: cmovaeq %rax, %rbx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne LBB8_1
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; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
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; CHECK-NEXT: movq %rax, _var(%rip)
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; CHECK-NEXT: movq %rdx, _var+8(%rip)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%val = atomicrmw umin ptr %p, i128 %bits seq_cst
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store i128 %val, ptr @var, align 16
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ret void
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}
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define void @fetch_and_umax(ptr %p, i128 %bits) {
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; CHECK-LABEL: fetch_and_umax:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: movq %rdx, %r8
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movq 8(%rdi), %rdx
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; CHECK-NEXT: .p2align 4, 0x90
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; CHECK-NEXT: LBB9_1: ## %atomicrmw.start
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; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: cmpq %rax, %rsi
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: sbbq %rdx, %rcx
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; CHECK-NEXT: movq %r8, %rcx
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; CHECK-NEXT: cmovbq %rdx, %rcx
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; CHECK-NEXT: movq %rsi, %rbx
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; CHECK-NEXT: cmovbq %rax, %rbx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: jne LBB9_1
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; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
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; CHECK-NEXT: movq %rax, _var(%rip)
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; CHECK-NEXT: movq %rdx, _var+8(%rip)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%val = atomicrmw umax ptr %p, i128 %bits seq_cst
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store i128 %val, ptr @var, align 16
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ret void
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}
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define i128 @atomic_load_seq_cst(ptr %p) {
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; CHECK-LABEL: atomic_load_seq_cst:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbx, -16
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: xorl %ebx, %ebx
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; CHECK-NEXT: lock cmpxchg16b (%rdi)
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; CHECK-NEXT: popq %rbx
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; CHECK-NEXT: retq
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%r = load atomic i128, ptr %p seq_cst, align 16
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ret i128 %r
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}
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define i128 @atomic_load_relaxed(ptr %p) {
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; CHECK-LABEL: atomic_load_relaxed:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: pushq %rbx
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||
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
||
|
|
; CHECK-NEXT: .cfi_offset %rbx, -16
|
||
|
|
; CHECK-NEXT: xorl %eax, %eax
|
||
|
|
; CHECK-NEXT: xorl %edx, %edx
|
||
|
|
; CHECK-NEXT: xorl %ecx, %ecx
|
||
|
|
; CHECK-NEXT: xorl %ebx, %ebx
|
||
|
|
; CHECK-NEXT: lock cmpxchg16b (%rdi)
|
||
|
|
; CHECK-NEXT: popq %rbx
|
||
|
|
; CHECK-NEXT: retq
|
||
|
|
%r = load atomic i128, ptr %p monotonic, align 16
|
||
|
|
ret i128 %r
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @atomic_store_seq_cst(ptr %p, i128 %in) {
|
||
|
|
; CHECK-LABEL: atomic_store_seq_cst:
|
||
|
|
; CHECK: ## %bb.0:
|
||
|
|
; CHECK-NEXT: pushq %rbx
|
||
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
||
|
|
; CHECK-NEXT: .cfi_offset %rbx, -16
|
||
|
|
; CHECK-NEXT: movq %rdx, %rcx
|
||
|
|
; CHECK-NEXT: movq %rsi, %rbx
|
||
|
|
; CHECK-NEXT: movq (%rdi), %rax
|
||
|
|
; CHECK-NEXT: movq 8(%rdi), %rdx
|
||
|
|
; CHECK-NEXT: .p2align 4, 0x90
|
||
|
|
; CHECK-NEXT: LBB12_1: ## %atomicrmw.start
|
||
|
|
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
|
||
|
|
; CHECK-NEXT: lock cmpxchg16b (%rdi)
|
||
|
|
; CHECK-NEXT: jne LBB12_1
|
||
|
|
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
|
||
|
|
; CHECK-NEXT: popq %rbx
|
||
|
|
; CHECK-NEXT: retq
|
||
|
|
store atomic i128 %in, ptr %p seq_cst, align 16
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @atomic_store_release(ptr %p, i128 %in) {
|
||
|
|
; CHECK-LABEL: atomic_store_release:
|
||
|
|
; CHECK: ## %bb.0:
|
||
|
|
; CHECK-NEXT: pushq %rbx
|
||
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
||
|
|
; CHECK-NEXT: .cfi_offset %rbx, -16
|
||
|
|
; CHECK-NEXT: movq %rdx, %rcx
|
||
|
|
; CHECK-NEXT: movq %rsi, %rbx
|
||
|
|
; CHECK-NEXT: movq (%rdi), %rax
|
||
|
|
; CHECK-NEXT: movq 8(%rdi), %rdx
|
||
|
|
; CHECK-NEXT: .p2align 4, 0x90
|
||
|
|
; CHECK-NEXT: LBB13_1: ## %atomicrmw.start
|
||
|
|
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
|
||
|
|
; CHECK-NEXT: lock cmpxchg16b (%rdi)
|
||
|
|
; CHECK-NEXT: jne LBB13_1
|
||
|
|
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
|
||
|
|
; CHECK-NEXT: popq %rbx
|
||
|
|
; CHECK-NEXT: retq
|
||
|
|
store atomic i128 %in, ptr %p release, align 16
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
define void @atomic_store_relaxed(ptr %p, i128 %in) {
|
||
|
|
; CHECK-LABEL: atomic_store_relaxed:
|
||
|
|
; CHECK: ## %bb.0:
|
||
|
|
; CHECK-NEXT: pushq %rbx
|
||
|
|
; CHECK-NEXT: .cfi_def_cfa_offset 16
|
||
|
|
; CHECK-NEXT: .cfi_offset %rbx, -16
|
||
|
|
; CHECK-NEXT: movq %rdx, %rcx
|
||
|
|
; CHECK-NEXT: movq %rsi, %rbx
|
||
|
|
; CHECK-NEXT: movq (%rdi), %rax
|
||
|
|
; CHECK-NEXT: movq 8(%rdi), %rdx
|
||
|
|
; CHECK-NEXT: .p2align 4, 0x90
|
||
|
|
; CHECK-NEXT: LBB14_1: ## %atomicrmw.start
|
||
|
|
; CHECK-NEXT: ## =>This Inner Loop Header: Depth=1
|
||
|
|
; CHECK-NEXT: lock cmpxchg16b (%rdi)
|
||
|
|
; CHECK-NEXT: jne LBB14_1
|
||
|
|
; CHECK-NEXT: ## %bb.2: ## %atomicrmw.end
|
||
|
|
; CHECK-NEXT: popq %rbx
|
||
|
|
; CHECK-NEXT: retq
|
||
|
|
store atomic i128 %in, ptr %p unordered, align 16
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
|