160 lines
6 KiB
LLVM
160 lines
6 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE42
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512F
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512BW
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define i8 @test_i8_knownbits(i8 %a) {
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; CHECK-LABEL: test_i8_knownbits:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: shrb %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%x = lshr i8 %a, 1
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%1 = call i8 @llvm.smax.i8(i8 %x, i8 0)
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ret i8 %1
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}
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define <16 x i8> @test_v16i8_nosignbit(<16 x i8> %a, <16 x i8> %b) {
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; SSE2-LABEL: test_v16i8_nosignbit:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
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; SSE2-NEXT: pand %xmm2, %xmm0
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; SSE2-NEXT: pand %xmm1, %xmm2
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; SSE2-NEXT: pmaxub %xmm2, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: test_v16i8_nosignbit:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
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; SSE41-NEXT: pand %xmm2, %xmm0
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; SSE41-NEXT: pand %xmm1, %xmm2
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; SSE41-NEXT: pmaxsb %xmm2, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE42-LABEL: test_v16i8_nosignbit:
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; SSE42: # %bb.0:
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; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
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; SSE42-NEXT: pand %xmm2, %xmm0
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; SSE42-NEXT: pand %xmm1, %xmm2
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; SSE42-NEXT: pmaxsb %xmm2, %xmm0
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; SSE42-NEXT: retq
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;
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; AVX1-LABEL: test_v16i8_nosignbit:
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; AVX1: # %bb.0:
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; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
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; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0
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; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
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; AVX1-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0
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; AVX1-NEXT: retq
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;
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; AVX2-LABEL: test_v16i8_nosignbit:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vpbroadcastb {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
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; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
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; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
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; AVX2-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0
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; AVX2-NEXT: retq
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%1 = and <16 x i8> %a, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>
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%2 = and <16 x i8> %b, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>
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%3 = icmp sgt <16 x i8> %1, %2
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%4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
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ret <16 x i8> %4
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}
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define <16 x i8> @test_v16i8_reassociation(<16 x i8> %a) {
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; SSE2-LABEL: test_v16i8_reassociation:
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; SSE2: # %bb.0:
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; SSE2-NEXT: pxor %xmm1, %xmm1
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; SSE2-NEXT: movdqa %xmm0, %xmm2
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; SSE2-NEXT: pcmpgtb %xmm1, %xmm2
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; SSE2-NEXT: pand %xmm2, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: test_v16i8_reassociation:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pxor %xmm1, %xmm1
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; SSE41-NEXT: pmaxsb %xmm1, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE42-LABEL: test_v16i8_reassociation:
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; SSE42: # %bb.0:
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; SSE42-NEXT: pxor %xmm1, %xmm1
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; SSE42-NEXT: pmaxsb %xmm1, %xmm0
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; SSE42-NEXT: retq
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;
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; AVX-LABEL: test_v16i8_reassociation:
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; AVX: # %bb.0:
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; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %a, <16 x i8> zeroinitializer)
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%2 = call <16 x i8> @llvm.smax.v16i8(<16 x i8> %1, <16 x i8> zeroinitializer)
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ret <16 x i8> %2
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}
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define <16 x i8> @test_v16i8_demandedbits(<16 x i8> %x, <16 x i8> %y, <16 x i8> %a, <16 x i8> %b) {
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; SSE2-LABEL: test_v16i8_demandedbits:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movdqa %xmm0, %xmm4
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; SSE2-NEXT: pcmpgtb %xmm1, %xmm4
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; SSE2-NEXT: pand %xmm4, %xmm0
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; SSE2-NEXT: pandn %xmm1, %xmm4
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; SSE2-NEXT: por %xmm0, %xmm4
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; SSE2-NEXT: pxor %xmm0, %xmm0
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; SSE2-NEXT: pcmpgtb %xmm4, %xmm0
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; SSE2-NEXT: pand %xmm0, %xmm3
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; SSE2-NEXT: pandn %xmm2, %xmm0
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; SSE2-NEXT: por %xmm3, %xmm0
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; SSE2-NEXT: retq
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;
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; SSE41-LABEL: test_v16i8_demandedbits:
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; SSE41: # %bb.0:
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; SSE41-NEXT: andps %xmm1, %xmm0
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; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
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; SSE41-NEXT: movdqa %xmm2, %xmm0
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; SSE41-NEXT: retq
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;
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; SSE42-LABEL: test_v16i8_demandedbits:
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; SSE42: # %bb.0:
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; SSE42-NEXT: andps %xmm1, %xmm0
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; SSE42-NEXT: pblendvb %xmm0, %xmm3, %xmm2
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; SSE42-NEXT: movdqa %xmm2, %xmm0
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; SSE42-NEXT: retq
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;
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; AVX1OR2-LABEL: test_v16i8_demandedbits:
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; AVX1OR2: # %bb.0:
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; AVX1OR2-NEXT: vpand %xmm1, %xmm0, %xmm0
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; AVX1OR2-NEXT: vpblendvb %xmm0, %xmm3, %xmm2, %xmm0
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; AVX1OR2-NEXT: retq
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;
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; AVX512F-LABEL: test_v16i8_demandedbits:
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; AVX512F: # %bb.0:
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; AVX512F-NEXT: vpand %xmm1, %xmm0, %xmm0
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; AVX512F-NEXT: vpblendvb %xmm0, %xmm3, %xmm2, %xmm0
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; AVX512F-NEXT: retq
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;
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; AVX512BW-LABEL: test_v16i8_demandedbits:
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; AVX512BW: # %bb.0:
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; AVX512BW-NEXT: # kill: def $xmm3 killed $xmm3 def $zmm3
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; AVX512BW-NEXT: # kill: def $xmm2 killed $xmm2 def $zmm2
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; AVX512BW-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0
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; AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; AVX512BW-NEXT: vpcmpnltb %zmm1, %zmm0, %k1
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; AVX512BW-NEXT: vpblendmb %zmm2, %zmm3, %zmm0 {%k1}
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; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
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; AVX512BW-NEXT: vzeroupper
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; AVX512BW-NEXT: retq
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%smax = tail call <16 x i8> @llvm.smax.v16i8(<16 x i8> %x, <16 x i8> %y)
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%cmp = icmp sge <16 x i8> %smax, zeroinitializer
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%res = select <16 x i1> %cmp, <16 x i8> %a, <16 x i8> %b
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ret <16 x i8> %res
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}
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declare i8 @llvm.smax.i8(i8, i8)
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declare <16 x i8> @llvm.smax.v16i8(<16 x i8>, <16 x i8>)
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