201 lines
6 KiB
LLVM
201 lines
6 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=X64
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declare i256 @llvm.get.fpenv.i256()
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declare void @llvm.set.fpenv.i256(i256 %fpenv)
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declare void @llvm.reset.fpenv()
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; Cannot fold get_fpenv+load+store because loaded value is used in
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; more than one instruction.
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define void @get_fpenv_02(ptr %ptr1, ptr %ptr2) #0 {
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; X64-LABEL: get_fpenv_02:
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; X64: # %bb.0:
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; X64-NEXT: pushq %r14
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; X64-NEXT: pushq %rbx
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; X64-NEXT: subq $40, %rsp
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; X64-NEXT: movq %rsi, %rbx
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; X64-NEXT: movq %rdi, %r14
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; X64-NEXT: movq %rsp, %rdi
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; X64-NEXT: callq fegetenv@PLT
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; X64-NEXT: movq (%rsp), %rcx
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rdx
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rsi
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; X64-NEXT: movq %rsi, 16(%r14)
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; X64-NEXT: movq %rcx, (%r14)
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; X64-NEXT: movq %rax, 24(%r14)
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; X64-NEXT: movq %rdx, 8(%r14)
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; X64-NEXT: movq %rsi, 16(%rbx)
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; X64-NEXT: movq %rcx, (%rbx)
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; X64-NEXT: movq %rax, 24(%rbx)
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; X64-NEXT: movq %rdx, 8(%rbx)
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; X64-NEXT: addq $40, %rsp
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; X64-NEXT: popq %rbx
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; X64-NEXT: popq %r14
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; X64-NEXT: retq
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%fpenv = call i256 @llvm.get.fpenv.i256()
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store i256 %fpenv, ptr %ptr1
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store i256 %fpenv, ptr %ptr2
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ret void
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}
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; Cannot fold get_fpenv+load+store because load and store have different type.
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define void @get_fpenv_03(ptr %ptr) #0 {
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; X64-LABEL: get_fpenv_03:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rbx
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; X64-NEXT: subq $32, %rsp
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; X64-NEXT: movq %rdi, %rbx
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; X64-NEXT: movq %rsp, %rdi
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; X64-NEXT: callq fegetenv@PLT
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; X64-NEXT: movl (%rsp), %eax
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; X64-NEXT: movl %eax, (%rbx)
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; X64-NEXT: addq $32, %rsp
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; X64-NEXT: popq %rbx
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; X64-NEXT: retq
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%fpenv = call i256 @llvm.get.fpenv.i256()
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%part = trunc i256 %fpenv to i32
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store i32 %part, ptr %ptr
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ret void
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}
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; Cannot fold get_fpenv+load+store because loaded value is not
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; immediately stored.
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define void @get_fpenv_04(ptr %ptr) #0 {
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; X64-LABEL: get_fpenv_04:
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; X64: # %bb.0:
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; X64-NEXT: pushq %rbx
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; X64-NEXT: subq $32, %rsp
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; X64-NEXT: movq %rdi, %rbx
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; X64-NEXT: movq %rsp, %rdi
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; X64-NEXT: callq fegetenv@PLT
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; X64-NEXT: movq (%rsp), %rax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: movq %rax, (%rbx)
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; X64-NEXT: movq $0, 24(%rbx)
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; X64-NEXT: movq $0, 8(%rbx)
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; X64-NEXT: movq $0, 16(%rbx)
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; X64-NEXT: addq $32, %rsp
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; X64-NEXT: popq %rbx
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; X64-NEXT: retq
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%fpenv = call i256 @llvm.get.fpenv.i256()
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%masked = and i256 %fpenv, 1
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store i256 %masked, ptr %ptr
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ret void
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}
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; Cannot fold get_fpenv+load+store because there is a memory operation
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; between load and store.
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define void @get_fpenv_05(ptr %ptr1, ptr %ptr2) #0 {
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; X64-LABEL: get_fpenv_05:
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; X64: # %bb.0:
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; X64-NEXT: pushq %r14
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; X64-NEXT: pushq %rbx
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; X64-NEXT: subq $40, %rsp
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; X64-NEXT: movq %rsi, %rbx
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; X64-NEXT: movq %rdi, %r14
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; X64-NEXT: movq %rsp, %rdi
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; X64-NEXT: callq fegetenv@PLT
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; X64-NEXT: movq (%rsp), %rax
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rcx
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rdx
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; X64-NEXT: movq {{[0-9]+}}(%rsp), %rsi
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; X64-NEXT: movl $0, (%r14)
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; X64-NEXT: movq %rsi, 24(%rbx)
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; X64-NEXT: movq %rdx, 16(%rbx)
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; X64-NEXT: movq %rcx, 8(%rbx)
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; X64-NEXT: movq %rax, (%rbx)
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; X64-NEXT: addq $40, %rsp
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; X64-NEXT: popq %rbx
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; X64-NEXT: popq %r14
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; X64-NEXT: retq
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%fpenv = call i256 @llvm.get.fpenv.i256()
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store i32 0, ptr %ptr1
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store i256 %fpenv, ptr %ptr2
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ret void
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}
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; Cannot fold load+save+set_fpenv because there is a memory operation
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; between load and store.
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define void @set_fpenv_02(ptr %ptr1, ptr %ptr2) #0 {
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; X64-LABEL: set_fpenv_02:
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; X64: # %bb.0:
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; X64-NEXT: subq $40, %rsp
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; X64-NEXT: movq (%rdi), %rax
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; X64-NEXT: movq 8(%rdi), %rcx
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; X64-NEXT: movq 16(%rdi), %rdx
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; X64-NEXT: movq 24(%rdi), %rdi
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; X64-NEXT: movl $0, (%rsi)
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; X64-NEXT: movq %rdi, {{[0-9]+}}(%rsp)
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; X64-NEXT: movq %rdx, {{[0-9]+}}(%rsp)
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; X64-NEXT: movq %rcx, {{[0-9]+}}(%rsp)
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; X64-NEXT: movq %rax, (%rsp)
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; X64-NEXT: movq %rsp, %rdi
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; X64-NEXT: callq fesetenv@PLT
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; X64-NEXT: addq $40, %rsp
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; X64-NEXT: retq
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%fpenv = load i256, ptr %ptr1
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store i32 0, ptr %ptr2
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call void @llvm.set.fpenv.i256(i256 %fpenv)
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ret void
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}
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; Cannot fold load+save+set_fpenv because loaded value is used in
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; more then one store.
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define void @set_fpenv_03(ptr %ptr1, ptr %ptr2) #0 {
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; X64-LABEL: set_fpenv_03:
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; X64: # %bb.0:
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; X64-NEXT: pushq %r15
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; X64-NEXT: pushq %r14
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; X64-NEXT: pushq %r13
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; X64-NEXT: pushq %r12
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; X64-NEXT: pushq %rbx
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; X64-NEXT: subq $32, %rsp
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; X64-NEXT: movq %rsi, %rbx
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; X64-NEXT: movq (%rdi), %r14
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; X64-NEXT: movq 8(%rdi), %r15
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; X64-NEXT: movq 16(%rdi), %r12
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; X64-NEXT: movq 24(%rdi), %r13
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; X64-NEXT: callq fesetenv@PLT
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; X64-NEXT: movq %r13, 24(%rbx)
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; X64-NEXT: movq %r12, 16(%rbx)
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; X64-NEXT: movq %r15, 8(%rbx)
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; X64-NEXT: movq %r14, (%rbx)
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; X64-NEXT: addq $32, %rsp
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; X64-NEXT: popq %rbx
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; X64-NEXT: popq %r12
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; X64-NEXT: popq %r13
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; X64-NEXT: popq %r14
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; X64-NEXT: popq %r15
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; X64-NEXT: retq
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%fpenv = load i256, ptr %ptr1
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call void @llvm.set.fpenv.i256(i256 %fpenv)
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store i256 %fpenv, ptr %ptr2
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ret void
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}
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; Cannot fold load+save+set_fpenv because loaded value is not
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; immediately stored.
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define void @set_fpenv_04(ptr %ptr) #0 {
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; X64-LABEL: set_fpenv_04:
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; X64: # %bb.0:
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; X64-NEXT: subq $40, %rsp
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; X64-NEXT: movq (%rdi), %rax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: movq %rax, (%rsp)
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; X64-NEXT: movq $0, {{[0-9]+}}(%rsp)
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; X64-NEXT: movq $0, {{[0-9]+}}(%rsp)
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; X64-NEXT: movq $0, {{[0-9]+}}(%rsp)
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; X64-NEXT: movq %rsp, %rdi
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; X64-NEXT: callq fesetenv@PLT
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; X64-NEXT: addq $40, %rsp
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; X64-NEXT: retq
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%fpenv = load i256, ptr %ptr
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%masked = and i256 %fpenv, 1
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call void @llvm.set.fpenv.i256(i256 %masked)
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ret void
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}
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attributes #0 = { nounwind "use-soft-float"="true" }
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