146 lines
4.8 KiB
LLVM
146 lines
4.8 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i386-pc-linux -stackrealign -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=i386-pc-none-elf -stackrealign -verify-machineinstrs < %s | FileCheck %s
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declare i32 @helper() nounwind
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define void @base() #0 {
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; CHECK-LABEL: base:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: .cfi_offset %ebp, -8
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK-NEXT: .cfi_def_cfa_register %ebp
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: andl $-32, %esp
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; CHECK-NEXT: subl $32, %esp
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; CHECK-NEXT: movl %esp, %esi
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; CHECK-NEXT: .cfi_offset %esi, -12
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; CHECK-NEXT: calll helper@PLT
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; CHECK-NEXT: movl %esp, %ecx
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; CHECK-NEXT: leal 31(,%eax,4), %eax
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; CHECK-NEXT: andl $-32, %eax
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; CHECK-NEXT: movl %ecx, %edx
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; CHECK-NEXT: subl %eax, %edx
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; CHECK-NEXT: movl %edx, %esp
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: movl $0, (%ecx,%eax)
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; CHECK-NEXT: leal -4(%ebp), %esp
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: .cfi_def_cfa %esp, 4
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; CHECK-NEXT: retl
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entry:
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%k = call i32 @helper()
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%a = alloca i32, i32 %k, align 4
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store i32 0, ptr %a, align 4
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ret void
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}
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define void @clobber_base() #0 {
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; CHECK-LABEL: clobber_base:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: leal {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: .cfi_def_cfa %ecx, 0
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; CHECK-NEXT: andl $-128, %esp
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; CHECK-NEXT: pushl -4(%ecx)
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK-NEXT: .cfi_escape 0x10, 0x05, 0x02, 0x75, 0x00 #
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: subl $244, %esp
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; CHECK-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; CHECK-NEXT: .cfi_escape 0x10, 0x06, 0x02, 0x75, 0x7c #
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; CHECK-NEXT: .cfi_escape 0x0f, 0x04, 0x75, 0x84, 0x7f, 0x06 #
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; CHECK-NEXT: calll helper@PLT
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; CHECK-NEXT: movl %esp, %ecx
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; CHECK-NEXT: leal 31(,%eax,4), %eax
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; CHECK-NEXT: andl $-32, %eax
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; CHECK-NEXT: movl %ecx, %edx
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; CHECK-NEXT: subl %eax, %edx
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; CHECK-NEXT: movl %edx, %esp
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: movl $405, %esi # imm = 0x195
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movl $8, %edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: movl %edx, -120(%ebp)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movl $0, (%ecx,%eax)
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; CHECK-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
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; CHECK-NEXT: leal -4(%ebp), %esp
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: leal -4(%ecx), %esp
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; CHECK-NEXT: .cfi_def_cfa %esp, 4
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; CHECK-NEXT: retl
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entry:
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%k = call i32 @helper()
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%a = alloca i32, align 128
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%b = alloca i32, i32 %k, align 4
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; clobber base pointer register
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tail call void asm sideeffect "nop", "{si}"(i32 405)
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call void asm sideeffect "movl $0, $1", "r,*m"(i32 8, ptr elementtype(i32) %a)
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store i32 0, ptr %b, align 4
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ret void
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}
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define x86_regcallcc void @clobber_baseptr_argptr(i32 %param1, i32 %param2, i32 %param3, i32 %param4, i32 %param5, i32 %param6) #0 {
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; CHECK-LABEL: clobber_baseptr_argptr:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebp
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; CHECK-NEXT: .cfi_def_cfa_offset 8
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; CHECK-NEXT: .cfi_offset %ebp, -8
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; CHECK-NEXT: movl %esp, %ebp
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; CHECK-NEXT: .cfi_def_cfa_register %ebp
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: andl $-128, %esp
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; CHECK-NEXT: subl $128, %esp
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; CHECK-NEXT: movl %esp, %esi
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; CHECK-NEXT: .cfi_offset %ebx, -12
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; CHECK-NEXT: movl 8(%ebp), %edi
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; CHECK-NEXT: calll helper@PLT
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; CHECK-NEXT: movl %esp, %ecx
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; CHECK-NEXT: leal 31(,%eax,4), %eax
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; CHECK-NEXT: andl $-32, %eax
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; CHECK-NEXT: movl %ecx, %edx
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; CHECK-NEXT: subl %eax, %edx
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; CHECK-NEXT: movl %edx, %esp
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; CHECK-NEXT: negl %eax
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; CHECK-NEXT: movl $405, %esi # imm = 0x195
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movl $405, %ebx # imm = 0x195
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; CHECK-NEXT: #APP
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; CHECK-NEXT: nop
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movl $8, %edx
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; CHECK-NEXT: #APP
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; CHECK-NEXT: movl %edx, (%esi)
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; CHECK-NEXT: #NO_APP
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; CHECK-NEXT: movl %edi, (%ecx,%eax)
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; CHECK-NEXT: leal -4(%ebp), %esp
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; CHECK-NEXT: popl %ebx
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; CHECK-NEXT: popl %ebp
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; CHECK-NEXT: .cfi_def_cfa %esp, 4
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; CHECK-NEXT: retl
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entry:
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%k = call i32 @helper()
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%a = alloca i32, align 128
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%b = alloca i32, i32 %k, align 4
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; clobber base pointer register
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tail call void asm sideeffect "nop", "{si}"(i32 405)
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; clobber argument pointer register
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tail call void asm sideeffect "nop", "{bx}"(i32 405)
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call void asm sideeffect "movl $0, $1", "r,*m"(i32 8, ptr elementtype(i32) %a)
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store i32 %param6, ptr %b, align 4
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ret void
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}
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attributes #0 = {"frame-pointer"="all"}
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!llvm.module.flags = !{!0}
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!0 = !{i32 2, !"override-stack-alignment", i32 32}
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