263 lines
12 KiB
LLVM
263 lines
12 KiB
LLVM
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; REQUIRES: arm-registered-target
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; REQUIRES: aarch64-registered-target
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; REQUIRES: x86-registered-target
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; RUN: llc -mtriple=i686-windows < %s | FileCheck %s --check-prefixes=CHECK,I686,NOTA32
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; RUN: llc -mtriple=x86_64-windows < %s | FileCheck %s --check-prefixes=CHECK,X64,NOTA32
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; RUN: llc -mtriple=aarch64-windows -aarch64-min-jump-table-entries=4 < %s | FileCheck %s --check-prefixes=CHECK,A64,NOTA32
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; RUN: llc -mtriple=thumbv7a-windows < %s | FileCheck %s --check-prefixes=CHECK,A32
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; RUN: llc -mtriple=x86_64-windows -filetype=obj < %s | llvm-readobj - --codeview | FileCheck %s --check-prefixes=CV
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; Generated by clang++ -S -c -std=c++11 -emit-llvm -g from the following C++11 source:
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; extern "C" void f1();
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; extern "C" void f2();
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; extern "C" void f3();
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; extern "C" void f4();
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; extern "C" void f5();
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; extern "C" void func(int i){
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; switch (i) {
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; case 0: f1(); break;
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; case 1: f2(); break;
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; case 2: f3(); break;
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; case 3: f4(); break;
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; }
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; switch (i) {
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; case 1: f2(); break;
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; case 2: f3(); break;
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; case 3: f4(); break;
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; case 4: f5(); break;
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; case 5: f1(); break;
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; }
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; }
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; i686 entries are absolute addresses (Base = 0, SwitchType = Pointer).
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; x86_64 entries are fixed-size and relative to the jump table (Base = Table,
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; SwitchType = Int32).
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; aarch64 entries are variable-sized and relative to the first entry's BB if
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; compressed (Base = Branch+0x4, SwitchType = UInt8ShiftLeft/UInt16ShiftLeft)
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; otherwise relative to the ADR instruction (Base = Branch-0xc, SwitchType =
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; Int32).
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; thumbv7a entries are either absolute addresses (Base = 0, SwitchType =
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; Pointer) OR variable-sized and relative to *after* the branch instruction
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; (Base = Branch+0x4, SwitchType = UInt8ShiftLeft/UInt16ShiftLeft/UInt32) but
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; there appears to be a bug where the offsets are always 0.
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; Verify branch labels match what's in the CodeView
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; X64: .Ltmp1:
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; X64-NEXT: jmpq *%{{.*}}
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; X64: .Ltmp4:
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; X64-NEXT: jmpq *%{{.*}}
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; A32: .LCPI0_0:
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; A32-NEXT add pc, r{{.*}}
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; NOTE: thumbv7a places the jump tables just after the branch, so verify the other branch below
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; A64: .Ltmp1:
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; A64-NEXT: br x{{.*}}
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; A64: .Ltmp4:
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; A64-NEXT: br x{{.*}}
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; Verify jump table have the same entry size, base offset and shift as what's in the CodeView
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; CHECK: {{\.?}}LJTI0_0:
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; I686-NEXT: .long LBB0_[[#]]
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; X64-NEXT: .long .LBB0_[[#]]-.LJTI0_0
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; A32-NEXT: .byte (($MBB0_[[#]])-(.LCPI0_0+4))/2
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; A64-NEXT: .byte (.LBB0_[[FIRSTBLOCK:[0-9]+]]-.LBB0_[[FIRSTBLOCK]])>>2
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; NOTE: thumbv7a places the jump tables just after the branch, so check for the other branch now
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; A32: .LCPI0_1:
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; A32-NEXT add pc, r{{.*}}
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; CHECK: {{\.?}}LJTI0_1:
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; I686-NEXT: .long LBB0_[[#]]
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; X64-NEXT: .long .LBB0_[[#]]-.LJTI0_1
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; A32-NEXT: .byte (($MBB0_[[#]])-(.LCPI0_1+4))/2
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; A64-NEXT: .byte (.LBB0_[[SECONDBLOCK:[0-9]+]]-.LBB0_[[SECONDBLOCK]])>>2
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; Verify CodeView
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; CHECK: [[INT16:\.short|\.hword]] 4441 [[COMMENT:#|//|@]] Record kind: S_ARMSWITCHTABLE
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; I686-NEXT: .long 0 [[COMMENT]] Base offset
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; I686-NEXT: .short 0 [[COMMENT]] Base section index
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; X64-NEXT: .secrel32 .LJTI0_0 [[COMMENT]] Base offset
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; X64-NEXT: .secidx .LJTI0_0 [[COMMENT]] Base section index
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; A32-NEXT: .secrel32 .LCPI0_0+4 [[COMMENT]] Base offset
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; A32-NEXT: .secidx .LCPI0_0 [[COMMENT]] Base section index
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; A64-NEXT: .secrel32 .LBB0_[[FIRSTBLOCK]] [[COMMENT]] Base offset
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; A64-NEXT: .secidx .LBB0_[[FIRSTBLOCK]] [[COMMENT]] Base section index
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; I686-NEXT: .short 6 [[COMMENT]] Switch type
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; X64-NEXT: .short 4 [[COMMENT]] Switch type
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; A32-NEXT: .short 7 [[COMMENT]] Switch type
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; A64-NEXT: .hword 7 [[COMMENT]] Switch type
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; NOTA32-NEXT: .secrel32 {{\.?}}Ltmp1 [[COMMENT]] Branch offset
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; A32-NEXT: .secrel32 .LCPI0_0 [[COMMENT]] Branch offset
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; CHECK-NEXT: .secrel32 {{\.?}}LJTI0_0 [[COMMENT]] Table offset
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; NOTA32-NEXT: .secidx {{\.?}}Ltmp1 [[COMMENT]] Branch section index
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; A32-NEXT: .secidx .LCPI0_0 [[COMMENT]] Branch section index
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; CHECK-NEXT: .secidx {{\.?}}LJTI0_0 [[COMMENT]] Table section index
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; CHECK-NEXT: [[INT32:\.long|\.word]] 4 [[COMMENT]] Entries count
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; CHECK: [[INT16]] 4441 [[COMMENT]] Record kind: S_ARMSWITCHTABLE
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; I686-NEXT: .long 0 [[COMMENT]] Base offset
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; I686-NEXT: .short 0 [[COMMENT]] Base section index
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; X64-NEXT: .secrel32 .LJTI0_1 [[COMMENT]] Base offset
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; X64-NEXT: .secidx .LJTI0_1 [[COMMENT]] Base section index
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; A32-NEXT: .secrel32 .LCPI0_1+4 [[COMMENT]] Base offset
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; A32-NEXT: .secidx .LCPI0_1 [[COMMENT]] Base section index
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; A64-NEXT: .secrel32 .LBB0_[[SECONDBLOCK]] [[COMMENT]] Base offset
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; A64-NEXT: .secidx .LBB0_[[SECONDBLOCK]] [[COMMENT]] Base section index
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; I686-NEXT: .short 6 [[COMMENT]] Switch type
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; X64-NEXT: .short 4 [[COMMENT]] Switch type
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; A32-NEXT: .short 7 [[COMMENT]] Switch type
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; A64-NEXT: .hword 7 [[COMMENT]] Switch type
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; NOTA32-NEXT: .secrel32 {{\.?}}Ltmp4 [[COMMENT]] Branch offset
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; A32-NEXT: .secrel32 .LCPI0_1 [[COMMENT]] Branch offset
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; CHECK-NEXT: .secrel32 {{\.?}}LJTI0_1 [[COMMENT]] Table offset
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; NOTA32-NEXT: .secidx {{\.?}}Ltmp4 [[COMMENT]] Branch section index
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; A32-NEXT: .secidx .LCPI0_1 [[COMMENT]] Branch section index
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; CHECK-NEXT: .secidx {{\.?}}LJTI0_1 [[COMMENT]] Table section index
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; CHECK-NEXT: [[INT32]] 5 [[COMMENT]] Entries count
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; CHECK-NOT: [[INT16]] 4441 [[COMMENT]] Record kind: S_ARMSWITCHTABLE
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; Verify CodeView as dumped by llvm-readobj
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; CV: Subsection [
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; CV: SubSectionType: Symbols (0xF1)
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; CV: GlobalProcIdSym {
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; CV: DisplayName: func
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; CV-NOT: GlobalProcIdSym
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; CV: JumpTableSym {
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; CV-NEXT: Kind: S_ARMSWITCHTABLE (0x1159)
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; CV-NEXT: BaseOffset: 0x0
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; CV-NEXT: BaseSegment: 0
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; CV-NEXT: SwitchType: Int32 (0x4)
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; CV-NEXT: BranchOffset: 0x23
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; CV-NEXT: TableOffset: 0x0
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; CV-NEXT: BranchSegment: 0
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; CV-NEXT: TableSegment: 0
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; CV-NEXT: EntriesCount: 4
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; CV-NEXT: }
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; CV-NEXT: JumpTableSym {
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; CV-NEXT: Kind: S_ARMSWITCHTABLE (0x1159)
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; CV-NEXT: BaseOffset: 0x10
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; CV-NEXT: BaseSegment: 0
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; CV-NEXT: SwitchType: Int32 (0x4)
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; CV-NEXT: BranchOffset: 0x5A
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; CV-NEXT: TableOffset: 0x10
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; CV-NEXT: BranchSegment: 0
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; CV-NEXT: TableSegment: 0
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; CV-NEXT: EntriesCount: 5
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; CV-NEXT: }
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; CV-NOT: JumpTableSym {
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source_filename = ".\\jump-table.cpp"
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target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-pc-windows-msvc19.35.32216"
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; Function Attrs: mustprogress noinline optnone uwtable
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define dso_local void @func(i32 noundef %0) #0 !dbg !8 {
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%2 = alloca i32, align 4
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store i32 %0, ptr %2, align 4
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call void @llvm.dbg.declare(metadata ptr %2, metadata !14, metadata !DIExpression()), !dbg !15
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%3 = load i32, ptr %2, align 4, !dbg !16
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switch i32 %3, label %8 [
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i32 0, label %4
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i32 1, label %5
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i32 2, label %6
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i32 3, label %7
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], !dbg !16
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4: ; preds = %1
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call void @f1(), !dbg !17
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br label %8, !dbg !17
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5: ; preds = %1
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call void @f2(), !dbg !19
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br label %8, !dbg !19
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6: ; preds = %1
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call void @f3(), !dbg !20
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br label %8, !dbg !20
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7: ; preds = %1
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call void @f4(), !dbg !21
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br label %8, !dbg !21
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8: ; preds = %1, %7, %6, %5, %4
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%9 = load i32, ptr %2, align 4, !dbg !22
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switch i32 %9, label %15 [
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i32 1, label %10
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i32 2, label %11
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i32 3, label %12
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i32 4, label %13
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i32 5, label %14
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], !dbg !22
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10: ; preds = %8
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call void @f2(), !dbg !23
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br label %15, !dbg !23
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11: ; preds = %8
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call void @f3(), !dbg !25
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br label %15, !dbg !25
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12: ; preds = %8
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call void @f4(), !dbg !26
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br label %15, !dbg !26
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13: ; preds = %8
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call void @f5(), !dbg !27
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br label %15, !dbg !27
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14: ; preds = %8
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call void @f1(), !dbg !28
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br label %15, !dbg !28
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15: ; preds = %8, %14, %13, %12, %11, %10
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ret void, !dbg !29
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}
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; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
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declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
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declare dso_local void @f1() #2
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declare dso_local void @f2() #2
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declare dso_local void @f3() #2
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declare dso_local void @f4() #2
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declare dso_local void @f5() #2
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attributes #0 = { mustprogress noinline optnone uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
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attributes #1 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
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attributes #2 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!2, !3, !4, !5, !6}
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!llvm.ident = !{!7}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_11, file: !1, producer: "clang version 15.0.1", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, splitDebugInlining: false, nameTableKind: None)
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!1 = !DIFile(filename: "jump-table.cpp", directory: "C:\\llvm", checksumkind: CSK_MD5, checksum: "35610c7104c8080f83e2bf6a02dabfc9")
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!2 = !{i32 2, !"CodeView", i32 1}
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!3 = !{i32 2, !"Debug Info Version", i32 3}
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!4 = !{i32 1, !"wchar_size", i32 2}
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!5 = !{i32 7, !"PIC Level", i32 2}
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!6 = !{i32 7, !"uwtable", i32 2}
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!7 = !{!"clang version 15.0.1"}
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!8 = distinct !DISubprogram(name: "func", scope: !9, file: !9, line: 6, type: !10, scopeLine: 6, flags: DIFlagPrototyped, spFlags: DISPFlagDefinition, unit: !0, retainedNodes: !13)
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!9 = !DIFile(filename: ".\\jump-table.cpp", directory: "C:\\llvm", checksumkind: CSK_MD5, checksum: "35610c7104c8080f83e2bf6a02dabfc9")
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!10 = !DISubroutineType(types: !11)
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!11 = !{null, !12}
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!12 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!13 = !{}
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!14 = !DILocalVariable(name: "i", arg: 1, scope: !8, file: !9, line: 6, type: !12)
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!15 = !DILocation(line: 6, scope: !8)
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!16 = !DILocation(line: 7, scope: !8)
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!17 = !DILocation(line: 8, scope: !18)
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!18 = distinct !DILexicalBlock(scope: !8, file: !9, line: 7)
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!19 = !DILocation(line: 9, scope: !18)
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!20 = !DILocation(line: 10, scope: !18)
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!21 = !DILocation(line: 11, scope: !18)
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!22 = !DILocation(line: 13, scope: !8)
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!23 = !DILocation(line: 14, scope: !24)
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!24 = distinct !DILexicalBlock(scope: !8, file: !9, line: 13)
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!25 = !DILocation(line: 15, scope: !24)
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!26 = !DILocation(line: 16, scope: !24)
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!27 = !DILocation(line: 17, scope: !24)
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!28 = !DILocation(line: 18, scope: !24)
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!29 = !DILocation(line: 20, scope: !8)
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