38 lines
1.8 KiB
ArmAsm
38 lines
1.8 KiB
ArmAsm
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// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 2>&1 < %s | FileCheck %s
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// --------------------------------------------------------------------------//
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// Invalid vector list
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sel {z0.h-z2.h}, pn8, {z0.h-z1.h}, {z0.h-z1.h}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: sel {z0.h-z2.h}, pn8, {z0.h-z1.h}, {z0.h-z1.h}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sel {z28.s-z31.s}, pn15, {z26.s-z31.s}, {z28.s-z31.s}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
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// CHECK-NEXT: sel {z28.s-z31.s}, pn15, {z26.s-z31.s}, {z28.s-z31.s}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sel {z28.d-z31.d}, pn15, {z28.d-z31.d}, {z26.d-z31.d}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors
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// CHECK-NEXT: sel {z28.d-z31.d}, pn15, {z28.d-z31.d}, {z26.d-z31.d}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sel {z1.b-z4.b}, pn8, {z0.b-z3.b}, {z0.b-z3.b}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 4 consecutive SVE vectors, where the first vector is a multiple of 4 and with matching element types
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// CHECK-NEXT: sel {z1.b-z4.b}, pn8, {z0.b-z3.b}, {z0.b-z3.b}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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sel {z22.s-z23.s}, pn11, {z13.s-z14.s}, {z8.s-z9.s}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
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// CHECK-NEXT: sel {z22.s-z23.s}, pn11, {z13.s-z14.s}, {z8.s-z9.s}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// Invalid Register Suffix
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sel {z0.h-z1.h}, pn8, {z0.h-z1.h}, {z0.s-z1.s}
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
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// CHECK-NEXT: sel {z0.h-z1.h}, pn8, {z0.h-z1.h}, {z0.s-z1.s}
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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