339 lines
10 KiB
ArmAsm
339 lines
10 KiB
ArmAsm
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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// ---------------------------------------------------------------------------//
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// Test 64-bit form (x0) and its aliases
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// ---------------------------------------------------------------------------//
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sqdech x0
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// CHECK-INST: sqdech x0
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// CHECK-ENCODING: [0xe0,0xfb,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fbe0 <unknown>
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sqdech x0, all
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// CHECK-INST: sqdech x0
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// CHECK-ENCODING: [0xe0,0xfb,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fbe0 <unknown>
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sqdech x0, all, mul #1
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// CHECK-INST: sqdech x0
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// CHECK-ENCODING: [0xe0,0xfb,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fbe0 <unknown>
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sqdech x0, all, mul #16
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// CHECK-INST: sqdech x0, all, mul #16
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// CHECK-ENCODING: [0xe0,0xfb,0x7f,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 047ffbe0 <unknown>
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// ---------------------------------------------------------------------------//
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// Test 32-bit form (x0, w0) and its aliases
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// ---------------------------------------------------------------------------//
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sqdech x0, w0
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// CHECK-INST: sqdech x0, w0
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// CHECK-ENCODING: [0xe0,0xfb,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0460fbe0 <unknown>
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sqdech x0, w0, all
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// CHECK-INST: sqdech x0, w0
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// CHECK-ENCODING: [0xe0,0xfb,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0460fbe0 <unknown>
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sqdech x0, w0, all, mul #1
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// CHECK-INST: sqdech x0, w0
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// CHECK-ENCODING: [0xe0,0xfb,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0460fbe0 <unknown>
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sqdech x0, w0, all, mul #16
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// CHECK-INST: sqdech x0, w0, all, mul #16
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// CHECK-ENCODING: [0xe0,0xfb,0x6f,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 046ffbe0 <unknown>
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sqdech x0, w0, pow2
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// CHECK-INST: sqdech x0, w0, pow2
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// CHECK-ENCODING: [0x00,0xf8,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0460f800 <unknown>
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sqdech x0, w0, pow2, mul #16
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// CHECK-INST: sqdech x0, w0, pow2, mul #16
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// CHECK-ENCODING: [0x00,0xf8,0x6f,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 046ff800 <unknown>
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// ---------------------------------------------------------------------------//
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// Test vector form and aliases.
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// ---------------------------------------------------------------------------//
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sqdech z0.h
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// CHECK-INST: sqdech z0.h
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// CHECK-ENCODING: [0xe0,0xcb,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0460cbe0 <unknown>
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sqdech z0.h, all
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// CHECK-INST: sqdech z0.h
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// CHECK-ENCODING: [0xe0,0xcb,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0460cbe0 <unknown>
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sqdech z0.h, all, mul #1
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// CHECK-INST: sqdech z0.h
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// CHECK-ENCODING: [0xe0,0xcb,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0460cbe0 <unknown>
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sqdech z0.h, all, mul #16
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// CHECK-INST: sqdech z0.h, all, mul #16
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// CHECK-ENCODING: [0xe0,0xcb,0x6f,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 046fcbe0 <unknown>
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sqdech z0.h, pow2
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// CHECK-INST: sqdech z0.h, pow2
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// CHECK-ENCODING: [0x00,0xc8,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0460c800 <unknown>
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sqdech z0.h, pow2, mul #16
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// CHECK-INST: sqdech z0.h, pow2, mul #16
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// CHECK-ENCODING: [0x00,0xc8,0x6f,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 046fc800 <unknown>
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// ---------------------------------------------------------------------------//
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// Test all patterns for 64-bit form
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// ---------------------------------------------------------------------------//
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sqdech x0, pow2
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// CHECK-INST: sqdech x0, pow2
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// CHECK-ENCODING: [0x00,0xf8,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f800 <unknown>
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sqdech x0, vl1
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// CHECK-INST: sqdech x0, vl1
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// CHECK-ENCODING: [0x20,0xf8,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f820 <unknown>
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sqdech x0, vl2
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// CHECK-INST: sqdech x0, vl2
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// CHECK-ENCODING: [0x40,0xf8,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f840 <unknown>
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sqdech x0, vl3
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// CHECK-INST: sqdech x0, vl3
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// CHECK-ENCODING: [0x60,0xf8,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f860 <unknown>
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sqdech x0, vl4
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// CHECK-INST: sqdech x0, vl4
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// CHECK-ENCODING: [0x80,0xf8,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f880 <unknown>
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sqdech x0, vl5
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// CHECK-INST: sqdech x0, vl5
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// CHECK-ENCODING: [0xa0,0xf8,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f8a0 <unknown>
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sqdech x0, vl6
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// CHECK-INST: sqdech x0, vl6
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// CHECK-ENCODING: [0xc0,0xf8,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f8c0 <unknown>
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sqdech x0, vl7
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// CHECK-INST: sqdech x0, vl7
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// CHECK-ENCODING: [0xe0,0xf8,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f8e0 <unknown>
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sqdech x0, vl8
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// CHECK-INST: sqdech x0, vl8
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// CHECK-ENCODING: [0x00,0xf9,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f900 <unknown>
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sqdech x0, vl16
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// CHECK-INST: sqdech x0, vl16
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// CHECK-ENCODING: [0x20,0xf9,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f920 <unknown>
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sqdech x0, vl32
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// CHECK-INST: sqdech x0, vl32
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// CHECK-ENCODING: [0x40,0xf9,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f940 <unknown>
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sqdech x0, vl64
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// CHECK-INST: sqdech x0, vl64
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// CHECK-ENCODING: [0x60,0xf9,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f960 <unknown>
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sqdech x0, vl128
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// CHECK-INST: sqdech x0, vl128
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// CHECK-ENCODING: [0x80,0xf9,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f980 <unknown>
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sqdech x0, vl256
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// CHECK-INST: sqdech x0, vl256
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// CHECK-ENCODING: [0xa0,0xf9,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f9a0 <unknown>
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sqdech x0, #14
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// CHECK-INST: sqdech x0, #14
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// CHECK-ENCODING: [0xc0,0xf9,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f9c0 <unknown>
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sqdech x0, #15
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// CHECK-INST: sqdech x0, #15
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// CHECK-ENCODING: [0xe0,0xf9,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470f9e0 <unknown>
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sqdech x0, #16
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// CHECK-INST: sqdech x0, #16
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// CHECK-ENCODING: [0x00,0xfa,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fa00 <unknown>
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sqdech x0, #17
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// CHECK-INST: sqdech x0, #17
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// CHECK-ENCODING: [0x20,0xfa,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fa20 <unknown>
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sqdech x0, #18
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// CHECK-INST: sqdech x0, #18
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// CHECK-ENCODING: [0x40,0xfa,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fa40 <unknown>
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sqdech x0, #19
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// CHECK-INST: sqdech x0, #19
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// CHECK-ENCODING: [0x60,0xfa,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fa60 <unknown>
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sqdech x0, #20
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// CHECK-INST: sqdech x0, #20
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// CHECK-ENCODING: [0x80,0xfa,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fa80 <unknown>
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sqdech x0, #21
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// CHECK-INST: sqdech x0, #21
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// CHECK-ENCODING: [0xa0,0xfa,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470faa0 <unknown>
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sqdech x0, #22
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// CHECK-INST: sqdech x0, #22
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// CHECK-ENCODING: [0xc0,0xfa,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fac0 <unknown>
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sqdech x0, #23
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// CHECK-INST: sqdech x0, #23
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// CHECK-ENCODING: [0xe0,0xfa,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fae0 <unknown>
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sqdech x0, #24
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// CHECK-INST: sqdech x0, #24
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// CHECK-ENCODING: [0x00,0xfb,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fb00 <unknown>
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sqdech x0, #25
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// CHECK-INST: sqdech x0, #25
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// CHECK-ENCODING: [0x20,0xfb,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fb20 <unknown>
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sqdech x0, #26
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// CHECK-INST: sqdech x0, #26
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// CHECK-ENCODING: [0x40,0xfb,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fb40 <unknown>
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sqdech x0, #27
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// CHECK-INST: sqdech x0, #27
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// CHECK-ENCODING: [0x60,0xfb,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fb60 <unknown>
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sqdech x0, #28
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// CHECK-INST: sqdech x0, #28
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// CHECK-ENCODING: [0x80,0xfb,0x70,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0470fb80 <unknown>
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// --------------------------------------------------------------------------//
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// Test compatibility with MOVPRFX instruction.
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movprfx z0, z7
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// CHECK-INST: movprfx z0, z7
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// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0420bce0 <unknown>
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sqdech z0.h
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// CHECK-INST: sqdech z0.h
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// CHECK-ENCODING: [0xe0,0xcb,0x60,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0460cbe0 <unknown>
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movprfx z0, z7
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// CHECK-INST: movprfx z0, z7
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// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve or sme
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// CHECK-UNKNOWN: 0420bce0 <unknown>
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||
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sqdech z0.h, pow2, mul #16
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// CHECK-INST: sqdech z0.h, pow2, mul #16
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||
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// CHECK-ENCODING: [0x00,0xc8,0x6f,0x04]
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||
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// CHECK-ERROR: instruction requires: sve or sme
|
||
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// CHECK-UNKNOWN: 046fc800 <unknown>
|
||
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movprfx z0, z7
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||
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// CHECK-INST: movprfx z0, z7
|
||
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// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
|
||
|
|
// CHECK-ERROR: instruction requires: sve or sme
|
||
|
|
// CHECK-UNKNOWN: 0420bce0 <unknown>
|
||
|
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|
||
|
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sqdech z0.h, pow2
|
||
|
|
// CHECK-INST: sqdech z0.h, pow2
|
||
|
|
// CHECK-ENCODING: [0x00,0xc8,0x60,0x04]
|
||
|
|
// CHECK-ERROR: instruction requires: sve or sme
|
||
|
|
// CHECK-UNKNOWN: 0460c800 <unknown>
|