bolt/deps/llvm-18.1.8/llvm/test/MC/AArch64/SVE/whilels-diagnostics.s

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2025-02-14 19:21:04 +01:00
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
// ------------------------------------------------------------------------- //
// Invalid scalar registers
whilels p15.b, xzr, sp
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilels p15.b, xzr, sp
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilels p15.b, xzr, w0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilels p15.b, xzr, w0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
whilels p15.b, w0, x0
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// CHECK-NEXT: whilels p15.b, w0, x0
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: