28 lines
1.1 KiB
ArmAsm
28 lines
1.1 KiB
ArmAsm
|
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 2>&1 < %s | FileCheck %s
|
||
|
|
||
|
// --------------------------------------------------------------------------//
|
||
|
// Invalid vector list
|
||
|
|
||
|
sqcvtn z0.h, {z0.s-z2.s}
|
||
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||
|
// CHECK-NEXT: sqcvtn z0.h, {z0.s-z2.s}
|
||
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||
|
|
||
|
sqcvtn z0.h, {z1.s-z2.s}
|
||
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
|
||
|
// CHECK-NEXT: sqcvtn z0.h, {z1.s-z2.s}
|
||
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||
|
|
||
|
// --------------------------------------------------------------------------//
|
||
|
// Invalid vector suffixes
|
||
|
|
||
|
sqcvtn z0.b, {z0.s-z1.s}
|
||
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
|
||
|
// CHECK-NEXT: sqcvtn z0.b, {z0.s-z1.s}
|
||
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|
||
|
|
||
|
sqcvtn z0.h, {z0.d-z1.d}
|
||
|
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
|
||
|
// CHECK-NEXT: sqcvtn z0.h, {z0.d-z1.d}
|
||
|
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
|