21 lines
1,002 B
ArmAsm
21 lines
1,002 B
ArmAsm
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# RUN: not llvm-mc -triple=riscv32 --mattr=+v,+xsfvcp %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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# RUN: not llvm-mc -triple=riscv64 --mattr=+v,+xsfvcp %s 2>&1 \
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# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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sf.vc.v.vvw 0x3, v0, v2, v0
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# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.{{$}}
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# CHECK-ERROR-LABEL: sf.vc.v.vvw 0x3, v0, v2, v0{{$}}
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sf.vc.v.xvw 0x3, v0, v0, a1
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# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.{{$}}
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# CHECK-ERROR-LABEL: sf.vc.v.xvw 0x3, v0, v0, a1{{$}}
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sf.vc.v.ivw 0x3, v0, v0, 15
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# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.{{$}}
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# CHECK-ERROR-LABEL: sf.vc.v.ivw 0x3, v0, v0, 15{{$}}
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sf.vc.v.fvw 0x1, v0, v0, fa1
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# CHECK-ERROR: The destination vector register group cannot overlap the source vector register group.{{$}}
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# CHECK-ERROR-LABEL: sf.vc.v.fvw 0x1, v0, v0, fa1{{$}}
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