128 lines
4.7 KiB
LLVM
128 lines
4.7 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals
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; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,TUNIT
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; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,CGSCC
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;
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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define i32 @vec_write_0() {
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; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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; CHECK-LABEL: define {{[^@]+}}@vec_write_0
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; CHECK-SAME: () #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: ret i32 0
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;
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%a = alloca <2 x i32>
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store <2 x i32> <i32 0, i32 0>, ptr %a
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%l1 = load i32, ptr %a
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%g = getelementptr i32, ptr %a, i64 1
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%l2 = load i32, ptr %g
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%add = add i32 %l1, %l2
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ret i32 %add
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}
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define i32 @vec_write_1() {
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; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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; CHECK-LABEL: define {{[^@]+}}@vec_write_1
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; CHECK-SAME: () #[[ATTR0]] {
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; CHECK-NEXT: ret i32 10
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;
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%a = alloca <2 x i32>
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store <2 x i32> <i32 5, i32 5>, ptr %a
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%l1B = load i32, ptr %a
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%g = getelementptr i32, ptr %a, i64 1
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%l2B = load i32, ptr %g
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%add = add i32 %l1B, %l2B
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ret i32 %add
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}
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; TODO: We should support this.
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define i32 @vec_write_2() {
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; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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; CHECK-LABEL: define {{[^@]+}}@vec_write_2
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; CHECK-SAME: () #[[ATTR0]] {
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; CHECK-NEXT: [[A:%.*]] = alloca <2 x i32>, align 8
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; CHECK-NEXT: store <2 x i32> <i32 3, i32 5>, ptr [[A]], align 8
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; CHECK-NEXT: [[L1:%.*]] = load i32, ptr [[A]], align 8
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; CHECK-NEXT: [[G:%.*]] = getelementptr i32, ptr [[A]], i64 1
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; CHECK-NEXT: [[L2:%.*]] = load i32, ptr [[G]], align 4
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; CHECK-NEXT: [[ADD:%.*]] = add i32 [[L1]], [[L2]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%a = alloca <2 x i32>
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store <2 x i32> <i32 3, i32 5>, ptr %a
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%l1 = load i32, ptr %a
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%g = getelementptr i32, ptr %a, i64 1
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%l2 = load i32, ptr %g
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%add = add i32 %l1, %l2
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ret i32 %add
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}
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define i32 @vec_write_3() {
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; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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; CHECK-LABEL: define {{[^@]+}}@vec_write_3
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; CHECK-SAME: () #[[ATTR0]] {
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; CHECK-NEXT: [[A:%.*]] = alloca <4 x i32>, align 16
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; CHECK-NEXT: store <2 x i32> <i32 3, i32 3>, ptr [[A]], align 16
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; CHECK-NEXT: [[G:%.*]] = getelementptr i32, ptr [[A]], i64 1
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; CHECK-NEXT: store <2 x i32> <i32 5, i32 5>, ptr [[G]], align 8
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; CHECK-NEXT: [[J:%.*]] = getelementptr i32, ptr [[G]], i64 1
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; CHECK-NEXT: [[L2B:%.*]] = load i32, ptr [[G]], align 8
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; CHECK-NEXT: [[ADD:%.*]] = add i32 3, [[L2B]]
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%a = alloca <4 x i32>
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store <2 x i32> <i32 3, i32 3>, ptr %a
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%g = getelementptr i32, ptr %a, i64 1
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store <2 x i32> <i32 5, i32 5>, ptr %g
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%j = getelementptr i32, ptr %g, i64 1
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store <2 x i32> <i32 7, i32 7>, ptr %j
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%l1B = load i32, ptr %a
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%l2B = load i32, ptr %g
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%add = add i32 %l1B, %l2B
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ret i32 %add
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}
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define i32 @vec_write_4() {
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; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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; CHECK-LABEL: define {{[^@]+}}@vec_write_4
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; CHECK-SAME: () #[[ATTR0]] {
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; CHECK-NEXT: ret i32 13
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;
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%a = alloca <4 x i32>
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store i32 3, ptr %a
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%g = getelementptr i32, ptr %a, i64 1
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store <2 x i32> <i32 5, i32 5>, ptr %g
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%j = getelementptr i32, ptr %g, i64 1
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%l1B = load i32, ptr %a
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%l2B = load i32, ptr %g
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%l3B = load i32, ptr %j
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%add1 = add i32 %l1B, %l2B
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%add2 = add i32 %l3B, %add1
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ret i32 %add2
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}
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define i32 @vec_write_5(i32 %arg) {
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; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
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; CHECK-LABEL: define {{[^@]+}}@vec_write_5
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; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[A:%.*]] = alloca <4 x i32>, align 16
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; CHECK-NEXT: store i32 [[ARG]], ptr [[A]], align 16
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; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[ARG]], 5
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; CHECK-NEXT: [[ADD2:%.*]] = add i32 5, [[ADD1]]
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; CHECK-NEXT: ret i32 [[ADD2]]
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;
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%a = alloca <4 x i32>
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store i32 %arg, ptr %a
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%g = getelementptr i32, ptr %a, i64 1
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store <2 x i32> <i32 5, i32 5>, ptr %g
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%j = getelementptr i32, ptr %g, i64 1
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%l1B5 = load i32, ptr %a
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%l2B5 = load i32, ptr %g
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%l3B5 = load i32, ptr %j
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%add1 = add i32 %l1B5, %l2B5
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%add2 = add i32 %l3B5, %add1
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ret i32 %add2
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}
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;.
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; CHECK: attributes #[[ATTR0]] = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) }
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;.
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CGSCC: {{.*}}
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; TUNIT: {{.*}}
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