343 lines
15 KiB
LLVM
343 lines
15 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=gvn -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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@a = common global [100 x i64] zeroinitializer, align 16
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@b = common global [100 x i64] zeroinitializer, align 16
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@g1 = common global i64 0, align 8
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@g2 = common global i64 0, align 8
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@g3 = common global i64 0, align 8
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declare i64 @goo(...) local_unnamed_addr #1
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define void @test1(i64 %a, i64 %b, i64 %c, i64 %d) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[B:%.*]], [[A:%.*]]
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; CHECK-NEXT: store i64 [[MUL]], ptr @g1, align 8
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; CHECK-NEXT: [[T0:%.*]] = load i64, ptr @g2, align 8
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[T0]], 3
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; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: [[MUL2:%.*]] = mul nsw i64 [[D:%.*]], [[C:%.*]]
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; CHECK-NEXT: store i64 [[MUL2]], ptr @g2, align 8
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; CHECK-NEXT: br label [[IF_END]]
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; CHECK: if.end:
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; CHECK-NEXT: [[MUL3_PRE_PHI:%.*]] = phi i64 [ [[MUL2]], [[IF_THEN]] ], [ [[MUL]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[B_ADDR_0:%.*]] = phi i64 [ [[D]], [[IF_THEN]] ], [ [[B]], [[ENTRY]] ]
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; CHECK-NEXT: [[A_ADDR_0:%.*]] = phi i64 [ [[C]], [[IF_THEN]] ], [ [[A]], [[ENTRY]] ]
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; CHECK-NEXT: store i64 [[MUL3_PRE_PHI]], ptr @g3, align 8
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; CHECK-NEXT: ret void
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;
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entry:
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%mul = mul nsw i64 %b, %a
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store i64 %mul, ptr @g1, align 8
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%t0 = load i64, ptr @g2, align 8
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%cmp = icmp sgt i64 %t0, 3
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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%mul2 = mul nsw i64 %d, %c
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store i64 %mul2, ptr @g2, align 8
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br label %if.end
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; Check phi-translate works and mul is removed.
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if.end: ; preds = %if.then, %entry
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%b.addr.0 = phi i64 [ %d, %if.then ], [ %b, %entry ]
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%a.addr.0 = phi i64 [ %c, %if.then ], [ %a, %entry ]
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%mul3 = mul nsw i64 %a.addr.0, %b.addr.0
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store i64 %mul3, ptr @g3, align 8
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ret void
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}
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define void @test2(i64 %i) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I:%.*]]
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; CHECK-NEXT: [[T0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8
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; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I]]
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; CHECK-NEXT: [[T1:%.*]] = load i64, ptr [[ARRAYIDX1]], align 8
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; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[T1]], [[T0]]
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; CHECK-NEXT: store i64 [[MUL]], ptr @g1, align 8
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MUL]], 3
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; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: [[CALL:%.*]] = tail call i64 (...) @goo()
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; CHECK-NEXT: store i64 [[CALL]], ptr @g2, align 8
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; CHECK-NEXT: [[T2_PRE:%.*]] = load i64, ptr getelementptr inbounds ([100 x i64], ptr @a, i64 0, i64 3), align 8
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; CHECK-NEXT: [[T3_PRE:%.*]] = load i64, ptr getelementptr inbounds ([100 x i64], ptr @b, i64 0, i64 3), align 8
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; CHECK-NEXT: [[DOTPRE:%.*]] = mul nsw i64 [[T3_PRE]], [[T2_PRE]]
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; CHECK-NEXT: br label [[IF_END]]
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; CHECK: if.end:
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; CHECK-NEXT: [[MUL5_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE]], [[IF_THEN]] ], [ [[MUL]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[T3:%.*]] = phi i64 [ [[T3_PRE]], [[IF_THEN]] ], [ [[T1]], [[ENTRY]] ]
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; CHECK-NEXT: [[T2:%.*]] = phi i64 [ [[T2_PRE]], [[IF_THEN]] ], [ [[T0]], [[ENTRY]] ]
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; CHECK-NEXT: [[I_ADDR_0:%.*]] = phi i64 [ 3, [[IF_THEN]] ], [ [[I]], [[ENTRY]] ]
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; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 [[I_ADDR_0]]
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; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 [[I_ADDR_0]]
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; CHECK-NEXT: store i64 [[MUL5_PRE_PHI]], ptr @g3, align 8
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; CHECK-NEXT: ret void
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;
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entry:
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%arrayidx = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 %i
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%t0 = load i64, ptr %arrayidx, align 8
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%arrayidx1 = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 %i
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%t1 = load i64, ptr %arrayidx1, align 8
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%mul = mul nsw i64 %t1, %t0
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store i64 %mul, ptr @g1, align 8
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%cmp = icmp sgt i64 %mul, 3
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br i1 %cmp, label %if.then, label %if.end
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; Check phi-translate works for the phi generated by loadpre. A new mul will be
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; inserted in if.then block.
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if.then: ; preds = %entry
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%call = tail call i64 (...) @goo() #2
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store i64 %call, ptr @g2, align 8
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br label %if.end
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if.end: ; preds = %if.then, %entry
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%i.addr.0 = phi i64 [ 3, %if.then ], [ %i, %entry ]
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%arrayidx3 = getelementptr inbounds [100 x i64], ptr @a, i64 0, i64 %i.addr.0
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%t2 = load i64, ptr %arrayidx3, align 8
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%arrayidx4 = getelementptr inbounds [100 x i64], ptr @b, i64 0, i64 %i.addr.0
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%t3 = load i64, ptr %arrayidx4, align 8
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%mul5 = mul nsw i64 %t3, %t2
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store i64 %mul5, ptr @g3, align 8
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ret void
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}
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; Check phi-translate doesn't go through backedge, which may lead to incorrect
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; pre transformation.
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define void @test3(i64 %N, ptr nocapture readonly %a) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I_0:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[ADD:%.*]], [[FOR_BODY:%.*]] ]
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; CHECK-NEXT: [[ADD]] = add nuw nsw i64 [[I_0]], 1
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i64, ptr [[A:%.*]], i64 [[ADD]]
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; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[ARRAYIDX]], align 8
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[I_0]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[CALL:%.*]] = tail call i64 (...) @goo()
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; CHECK-NEXT: [[ADD1:%.*]] = sub nsw i64 0, [[CALL]]
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[TMP0]], [[ADD1]]
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; CHECK-NEXT: br i1 [[TOBOOL]], label [[FOR_COND]], label [[FOR_END]]
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; CHECK: for.end:
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; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, ptr [[A]], i64 [[I_0]]
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; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[ARRAYIDX2]], align 8
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; CHECK-NEXT: store i64 [[TMP1]], ptr @g1, align 8
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.cond
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for.cond: ; preds = %for.body, %entry
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%i.0 = phi i64 [ 0, %entry ], [ %add, %for.body ]
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%add = add nuw nsw i64 %i.0, 1
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%arrayidx = getelementptr inbounds i64, ptr %a, i64 %add
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%tmp0 = load i64, ptr %arrayidx, align 8
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%cmp = icmp slt i64 %i.0, %N
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %for.cond
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%call = tail call i64 (...) @goo() #2
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%add1 = sub nsw i64 0, %call
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%tobool = icmp eq i64 %tmp0, %add1
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br i1 %tobool, label %for.cond, label %for.end
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for.end: ; preds = %for.body, %for.cond
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%i.0.lcssa = phi i64 [ %i.0, %for.body ], [ %i.0, %for.cond ]
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%arrayidx2 = getelementptr inbounds i64, ptr %a, i64 %i.0.lcssa
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%tmp1 = load i64, ptr %arrayidx2, align 8
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store i64 %tmp1, ptr @g1, align 8
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ret void
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}
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; It is incorrect to use the value of %andres in last loop iteration
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; to do pre.
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define i32 @test4(i32 %cond, i32 %SectionAttrs.0231.ph, ptr %AttrFlag) {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: for.body.preheader:
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; CHECK-NEXT: [[T514:%.*]] = load volatile i32, ptr [[ATTRFLAG:%.*]], align 4
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[T320:%.*]] = phi i32 [ [[T334:%.*]], [[BB343:%.*]] ], [ [[T514]], [[FOR_BODY_PREHEADER:%.*]] ]
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; CHECK-NEXT: [[ANDRES:%.*]] = and i32 [[T320]], [[SECTIONATTRS_0231_PH:%.*]]
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; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[ANDRES]], 0
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; CHECK-NEXT: br i1 [[TOBOOL1]], label [[BB343]], label [[CRITEDGE_LOOPEXIT:%.*]]
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; CHECK: bb343:
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; CHECK-NEXT: [[T334]] = load volatile i32, ptr [[ATTRFLAG]], align 4
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; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i32 [[COND:%.*]], 0
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; CHECK-NEXT: br i1 [[TOBOOL2]], label [[CRITEDGE_LOOPEXIT]], label [[FOR_BODY]]
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; CHECK: critedge.loopexit:
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; CHECK-NEXT: unreachable
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;
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for.body.preheader:
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%t514 = load volatile i32, ptr %AttrFlag
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br label %for.body
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for.body:
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%t320 = phi i32 [ %t334, %bb343 ], [ %t514, %for.body.preheader ]
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%andres = and i32 %t320, %SectionAttrs.0231.ph
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%tobool1 = icmp eq i32 %andres, 0
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br i1 %tobool1, label %bb343, label %critedge.loopexit
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bb343:
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%t334 = load volatile i32, ptr %AttrFlag
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%tobool2 = icmp eq i32 %cond, 0
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br i1 %tobool2, label %critedge.loopexit, label %for.body
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critedge.loopexit:
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unreachable
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}
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declare void @bar(...) local_unnamed_addr #1
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; Check sub expression will be pre transformed.
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define i64 @test5(ptr %start, ptr %e, i32 %n1, i32 %n2) local_unnamed_addr #0 {
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SUB_PTR_LHS_CAST:%.*]] = ptrtoint ptr [[E:%.*]] to i64
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; CHECK-NEXT: [[SUB_PTR_RHS_CAST:%.*]] = ptrtoint ptr [[START:%.*]] to i64
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; CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[SUB_PTR_SUB]], 4000
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; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END3:%.*]]
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; CHECK: if.then:
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; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[N1:%.*]], [[N2:%.*]]
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; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_ELSE:%.*]]
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; CHECK: if.then2:
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; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[START]], i64 800
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; CHECK-NEXT: [[DOTPRE:%.*]] = ptrtoint ptr [[ADD_PTR]] to i64
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; CHECK-NEXT: [[DOTPRE1:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[DOTPRE]]
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; CHECK-NEXT: br label [[IF_END3]]
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; CHECK: if.else:
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; CHECK-NEXT: tail call void (...) @bar()
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; CHECK-NEXT: br label [[IF_END3]]
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; CHECK: if.end3:
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; CHECK-NEXT: [[SUB_PTR_SUB6_PRE_PHI:%.*]] = phi i64 [ [[SUB_PTR_SUB]], [[IF_ELSE]] ], [ [[DOTPRE1]], [[IF_THEN2]] ], [ [[SUB_PTR_SUB]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[SUB_PTR_RHS_CAST5_PRE_PHI:%.*]] = phi i64 [ [[SUB_PTR_RHS_CAST]], [[IF_ELSE]] ], [ [[DOTPRE]], [[IF_THEN2]] ], [ [[SUB_PTR_RHS_CAST]], [[ENTRY]] ]
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; CHECK-NEXT: [[P_0:%.*]] = phi ptr [ [[ADD_PTR]], [[IF_THEN2]] ], [ [[START]], [[IF_ELSE]] ], [ [[START]], [[ENTRY]] ]
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; CHECK-NEXT: [[SUB_PTR_DIV7:%.*]] = ashr exact i64 [[SUB_PTR_SUB6_PRE_PHI]], 2
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; CHECK-NEXT: ret i64 [[SUB_PTR_DIV7]]
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;
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entry:
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%sub.ptr.lhs.cast = ptrtoint ptr %e to i64
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%sub.ptr.rhs.cast = ptrtoint ptr %start to i64
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%sub.ptr.sub = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast
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%cmp = icmp sgt i64 %sub.ptr.sub, 4000
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br i1 %cmp, label %if.then, label %if.end3
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if.then: ; preds = %entry
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%cmp1 = icmp sgt i32 %n1, %n2
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br i1 %cmp1, label %if.then2, label %if.else
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if.then2: ; preds = %if.then
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%add.ptr = getelementptr inbounds i32, ptr %start, i64 800
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br label %if.end3
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if.else: ; preds = %if.then
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tail call void (...) @bar() #2
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br label %if.end3
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if.end3: ; preds = %if.then2, %if.else, %entry
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%p.0 = phi ptr [ %add.ptr, %if.then2 ], [ %start, %if.else ], [ %start, %entry ]
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%sub.ptr.rhs.cast5 = ptrtoint ptr %p.0 to i64
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%sub.ptr.sub6 = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast5
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%sub.ptr.div7 = ashr exact i64 %sub.ptr.sub6, 2
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ret i64 %sub.ptr.div7
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}
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; Here the load from arrayidx1 is partially redundant, but its value is
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; available in if.then. Check that we correctly phi-translate to the phi that
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; the load has been replaced with.
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define void @test6(ptr %ptr) {
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; CHECK-LABEL: @test6(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ARRAYIDX1_PHI_TRANS_INSERT:%.*]] = getelementptr inbounds i32, ptr [[PTR:%.*]], i64 1
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; CHECK-NEXT: [[DOTPRE:%.*]] = load i32, ptr [[ARRAYIDX1_PHI_TRANS_INSERT]], align 4
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; CHECK-NEXT: br label [[WHILE:%.*]]
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; CHECK: while:
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; CHECK-NEXT: [[TMP0:%.*]] = phi i32 [ [[DOTPRE]], [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[IF_END:%.*]] ]
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; CHECK-NEXT: [[I:%.*]] = phi i64 [ 1, [[ENTRY]] ], [ [[I_NEXT:%.*]], [[IF_END]] ]
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; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[I]]
|
||
|
|
; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
|
||
|
|
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[PTR]], i64 [[I_NEXT]]
|
||
|
|
; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4
|
||
|
|
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP0]], [[TMP1]]
|
||
|
|
; CHECK-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_END]]
|
||
|
|
; CHECK: if.then:
|
||
|
|
; CHECK-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX1]], align 4
|
||
|
|
; CHECK-NEXT: store i32 [[TMP0]], ptr [[ARRAYIDX2]], align 4
|
||
|
|
; CHECK-NEXT: br label [[IF_END]]
|
||
|
|
; CHECK: if.end:
|
||
|
|
; CHECK-NEXT: [[TMP2]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ [[TMP1]], [[WHILE]] ]
|
||
|
|
; CHECK-NEXT: br i1 undef, label [[WHILE_END:%.*]], label [[WHILE]]
|
||
|
|
; CHECK: while.end:
|
||
|
|
; CHECK-NEXT: ret void
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
br label %while
|
||
|
|
|
||
|
|
while:
|
||
|
|
%i = phi i64 [ 1, %entry ], [ %i.next, %if.end ]
|
||
|
|
%arrayidx1 = getelementptr inbounds i32, ptr %ptr, i64 %i
|
||
|
|
%0 = load i32, ptr %arrayidx1, align 4
|
||
|
|
%i.next = add nuw nsw i64 %i, 1
|
||
|
|
%arrayidx2 = getelementptr inbounds i32, ptr %ptr, i64 %i.next
|
||
|
|
%1 = load i32, ptr %arrayidx2, align 4
|
||
|
|
%cmp = icmp sgt i32 %0, %1
|
||
|
|
br i1 %cmp, label %if.then, label %if.end
|
||
|
|
|
||
|
|
if.then:
|
||
|
|
store i32 %1, ptr %arrayidx1, align 4
|
||
|
|
store i32 %0, ptr %arrayidx2, align 4
|
||
|
|
br label %if.end
|
||
|
|
|
||
|
|
if.end:
|
||
|
|
br i1 undef, label %while.end, label %while
|
||
|
|
|
||
|
|
while.end:
|
||
|
|
ret void
|
||
|
|
}
|
||
|
|
|
||
|
|
; Load from arrayidx2 is partially redundant, check that address translation can
|
||
|
|
; fold sext + trunc across phi node together.
|
||
|
|
define i32 @test7(ptr noalias %ptr1, ptr noalias %ptr2, i32 %i, i1 %cond) {
|
||
|
|
; CHECK-LABEL: @test7(
|
||
|
|
; CHECK-NEXT: entry:
|
||
|
|
; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[ENTRY_IF_END_CRIT_EDGE:%.*]]
|
||
|
|
; CHECK: entry.if.end_crit_edge:
|
||
|
|
; CHECK-NEXT: [[RES_PRE:%.*]] = load i32, ptr [[PTR1:%.*]], align 4
|
||
|
|
; CHECK-NEXT: br label [[IF_END:%.*]]
|
||
|
|
; CHECK: if.then:
|
||
|
|
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[PTR1]], i32 [[I:%.*]]
|
||
|
|
; CHECK-NEXT: [[TMP:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
|
||
|
|
; CHECK-NEXT: store i32 [[TMP]], ptr [[PTR2:%.*]], align 4
|
||
|
|
; CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[I]] to i64
|
||
|
|
; CHECK-NEXT: br label [[IF_END]]
|
||
|
|
; CHECK: if.end:
|
||
|
|
; CHECK-NEXT: [[RES:%.*]] = phi i32 [ [[RES_PRE]], [[ENTRY_IF_END_CRIT_EDGE]] ], [ [[TMP]], [[IF_THEN]] ]
|
||
|
|
; CHECK-NEXT: [[IDX:%.*]] = phi i64 [ 0, [[ENTRY_IF_END_CRIT_EDGE]] ], [ [[IDX_EXT]], [[IF_THEN]] ]
|
||
|
|
; CHECK-NEXT: [[IDX_TRUNC:%.*]] = trunc i64 [[IDX]] to i32
|
||
|
|
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr [[PTR1]], i32 [[IDX_TRUNC]]
|
||
|
|
; CHECK-NEXT: ret i32 [[RES]]
|
||
|
|
;
|
||
|
|
entry:
|
||
|
|
br i1 %cond, label %if.then, label %if.end
|
||
|
|
|
||
|
|
if.then:
|
||
|
|
%arrayidx = getelementptr inbounds i32, ptr %ptr1, i32 %i
|
||
|
|
%tmp = load i32, ptr %arrayidx, align 4
|
||
|
|
store i32 %tmp, ptr %ptr2, align 4
|
||
|
|
%idx.ext = sext i32 %i to i64
|
||
|
|
br label %if.end
|
||
|
|
|
||
|
|
if.end:
|
||
|
|
%idx = phi i64 [ 0, %entry ], [ %idx.ext, %if.then ]
|
||
|
|
%idx.trunc = trunc i64 %idx to i32
|
||
|
|
%arrayidx2 = getelementptr inbounds i32, ptr %ptr1, i32 %idx.trunc
|
||
|
|
%res = load i32, ptr %arrayidx2, align 4
|
||
|
|
ret i32 %res
|
||
|
|
}
|