123 lines
3.3 KiB
LLVM
123 lines
3.3 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt %s -passes=instcombine -S | FileCheck %s
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define i1 @test_switch_with_zext(i16 %a, i1 %b, i1 %c) {
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; CHECK-LABEL: define i1 @test_switch_with_zext(
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; CHECK-SAME: i16 [[A:%.*]], i1 [[B:%.*]], i1 [[C:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: switch i16 [[A]], label [[SW_DEFAULT:%.*]] [
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; CHECK-NEXT: i16 37, label [[SW_BB:%.*]]
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; CHECK-NEXT: i16 38, label [[SW_BB]]
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; CHECK-NEXT: i16 39, label [[SW_BB]]
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; CHECK-NEXT: ]
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; CHECK: sw.bb:
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; CHECK-NEXT: ret i1 [[B]]
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; CHECK: sw.default:
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; CHECK-NEXT: ret i1 [[C]]
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;
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entry:
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%a.ext = zext i16 %a to i32
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switch i32 %a.ext, label %sw.default [
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i32 37, label %sw.bb
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i32 38, label %sw.bb
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i32 39, label %sw.bb
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]
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sw.bb:
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ret i1 %b
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sw.default:
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ret i1 %c
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}
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define i1 @test_switch_with_sext(i16 %a, i1 %b, i1 %c) {
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; CHECK-LABEL: define i1 @test_switch_with_sext(
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; CHECK-SAME: i16 [[A:%.*]], i1 [[B:%.*]], i1 [[C:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: switch i16 [[A]], label [[SW_DEFAULT:%.*]] [
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; CHECK-NEXT: i16 37, label [[SW_BB:%.*]]
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; CHECK-NEXT: i16 38, label [[SW_BB]]
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; CHECK-NEXT: i16 39, label [[SW_BB]]
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; CHECK-NEXT: ]
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; CHECK: sw.bb:
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; CHECK-NEXT: ret i1 [[B]]
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; CHECK: sw.default:
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; CHECK-NEXT: ret i1 [[C]]
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;
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entry:
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%a.ext = sext i16 %a to i32
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switch i32 %a.ext, label %sw.default [
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i32 37, label %sw.bb
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i32 38, label %sw.bb
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i32 39, label %sw.bb
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]
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sw.bb:
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ret i1 %b
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sw.default:
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ret i1 %c
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}
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; Negative tests
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define i1 @test_switch_with_zext_unreachable_case(i16 %a, i1 %b, i1 %c) {
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; CHECK-LABEL: define i1 @test_switch_with_zext_unreachable_case(
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; CHECK-SAME: i16 [[A:%.*]], i1 [[B:%.*]], i1 [[C:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_EXT:%.*]] = zext i16 [[A]] to i32
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; CHECK-NEXT: switch i32 [[A_EXT]], label [[SW_DEFAULT:%.*]] [
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; CHECK-NEXT: i32 37, label [[SW_BB:%.*]]
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; CHECK-NEXT: i32 38, label [[SW_BB]]
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; CHECK-NEXT: i32 39, label [[SW_BB]]
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; CHECK-NEXT: i32 65537, label [[SW_BB]]
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; CHECK-NEXT: ]
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; CHECK: sw.bb:
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; CHECK-NEXT: ret i1 [[B]]
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; CHECK: sw.default:
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; CHECK-NEXT: ret i1 [[C]]
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;
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entry:
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%a.ext = zext i16 %a to i32
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switch i32 %a.ext, label %sw.default [
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i32 37, label %sw.bb
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i32 38, label %sw.bb
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i32 39, label %sw.bb
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i32 65537, label %sw.bb
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]
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sw.bb:
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ret i1 %b
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sw.default:
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ret i1 %c
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}
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define i1 @test_switch_with_sext_unreachable_case(i16 %a, i1 %b, i1 %c) {
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; CHECK-LABEL: define i1 @test_switch_with_sext_unreachable_case(
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; CHECK-SAME: i16 [[A:%.*]], i1 [[B:%.*]], i1 [[C:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_EXT:%.*]] = sext i16 [[A]] to i32
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; CHECK-NEXT: switch i32 [[A_EXT]], label [[SW_DEFAULT:%.*]] [
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; CHECK-NEXT: i32 37, label [[SW_BB:%.*]]
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; CHECK-NEXT: i32 38, label [[SW_BB]]
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; CHECK-NEXT: i32 39, label [[SW_BB]]
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; CHECK-NEXT: i32 -65537, label [[SW_BB]]
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; CHECK-NEXT: ]
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; CHECK: sw.bb:
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; CHECK-NEXT: ret i1 [[B]]
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; CHECK: sw.default:
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; CHECK-NEXT: ret i1 [[C]]
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;
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entry:
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%a.ext = sext i16 %a to i32
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switch i32 %a.ext, label %sw.default [
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i32 37, label %sw.bb
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i32 38, label %sw.bb
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i32 39, label %sw.bb
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i32 -65537, label %sw.bb
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]
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sw.bb:
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ret i1 %b
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sw.default:
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ret i1 %c
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}
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