236 lines
7.1 KiB
LLVM
236 lines
7.1 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -passes=licm < %s | FileCheck %s --check-prefixes=CHECK,MT
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; RUN: opt -S -passes=licm -licm-force-thread-model-single < %s | FileCheck %s --check-prefixes=CHECK,ST
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@g = external global i32
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@c = external constant i32
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declare void @capture(ptr)
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; Even in single-thread mode, can only perform load-only promotion for globals,
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; because we might not have provenance to write to the global. See
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; promote_global_noalias for an example of the issue.
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define void @promote_global(i1 %c, i1 %c2) {
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; CHECK-LABEL: @promote_global(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[G_PROMOTED:%.*]] = load i32, ptr @g, align 4
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[V_INC2:%.*]] = phi i32 [ [[V_INC1:%.*]], [[LATCH:%.*]] ], [ [[G_PROMOTED]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LATCH]]
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; CHECK: if:
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; CHECK-NEXT: [[V_INC:%.*]] = add i32 [[V_INC2]], 1
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; CHECK-NEXT: store i32 [[V_INC]], ptr @g, align 4
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; CHECK-NEXT: br label [[LATCH]]
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; CHECK: latch:
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; CHECK-NEXT: [[V_INC1]] = phi i32 [ [[V_INC]], [[IF]] ], [ [[V_INC2]], [[LOOP]] ]
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; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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br i1 %c, label %if, label %latch
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if:
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%v = load i32, ptr @g
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%v.inc = add i32 %v, 1
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store i32 %v.inc, ptr @g
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br label %latch
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latch:
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br i1 %c2, label %exit, label %loop
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exit:
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ret void
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}
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; The store can never be promoted here, because the global is constant, and
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; the store could trap.
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define void @promote_constant_global(i1 %c, i1 %c2) {
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; CHECK-LABEL: @promote_constant_global(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[V:%.*]] = load i32, ptr @c, align 4
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; CHECK-NEXT: [[V_INC:%.*]] = add i32 [[V]], 1
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LATCH:%.*]]
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; CHECK: if:
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; CHECK-NEXT: store i32 [[V_INC]], ptr @c, align 4
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; CHECK-NEXT: br label [[LATCH]]
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; CHECK: latch:
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; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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br i1 %c, label %if, label %latch
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if:
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%v = load i32, ptr @c
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%v.inc = add i32 %v, 1
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store i32 %v.inc, ptr @c
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br label %latch
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latch:
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br i1 %c2, label %exit, label %loop
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exit:
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ret void
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}
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; if %c is false and %ptr == @g, then this should store 42 to the pointer.
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; However, if we perform load+store promotion, then we would instead store the
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; original value of the global.
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define void @promote_global_noalias(i1 %c, i1 %c2, ptr noalias %ptr) {
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; CHECK-LABEL: @promote_global_noalias(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[G_PROMOTED:%.*]] = load i32, ptr @g, align 4
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[V_INC2:%.*]] = phi i32 [ [[V_INC1:%.*]], [[LATCH:%.*]] ], [ [[G_PROMOTED]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
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; CHECK: if:
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; CHECK-NEXT: [[V_INC:%.*]] = add i32 [[V_INC2]], 1
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; CHECK-NEXT: store i32 [[V_INC]], ptr @g, align 4
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; CHECK-NEXT: br label [[LATCH]]
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; CHECK: else:
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; CHECK-NEXT: store i32 42, ptr [[PTR:%.*]], align 4
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; CHECK-NEXT: br label [[LATCH]]
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; CHECK: latch:
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; CHECK-NEXT: [[V_INC1]] = phi i32 [ [[V_INC2]], [[ELSE]] ], [ [[V_INC]], [[IF]] ]
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; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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br i1 %c, label %if, label %else
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if:
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%v = load i32, ptr @g
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%v.inc = add i32 %v, 1
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store i32 %v.inc, ptr @g
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br label %latch
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else:
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store i32 42, ptr %ptr
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br label %latch
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latch:
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br i1 %c2, label %exit, label %loop
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exit:
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ret void
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}
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; In single-thread mode both loads and stores can be promoted. In multi-thread
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; mode only loads can be promoted, as a different thread might write to the
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; captured alloca.
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define void @promote_captured_alloca(i1 %c, i1 %c2) {
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; MT-LABEL: @promote_captured_alloca(
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; MT-NEXT: entry:
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; MT-NEXT: [[A:%.*]] = alloca i32, align 4
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; MT-NEXT: call void @capture(ptr [[A]])
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; MT-NEXT: [[A_PROMOTED:%.*]] = load i32, ptr [[A]], align 4
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; MT-NEXT: br label [[LOOP:%.*]]
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; MT: loop:
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; MT-NEXT: [[V_INC2:%.*]] = phi i32 [ [[V_INC1:%.*]], [[LATCH:%.*]] ], [ [[A_PROMOTED]], [[ENTRY:%.*]] ]
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; MT-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LATCH]]
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; MT: if:
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; MT-NEXT: [[V_INC:%.*]] = add i32 [[V_INC2]], 1
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; MT-NEXT: store i32 [[V_INC]], ptr [[A]], align 4
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; MT-NEXT: br label [[LATCH]]
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; MT: latch:
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; MT-NEXT: [[V_INC1]] = phi i32 [ [[V_INC]], [[IF]] ], [ [[V_INC2]], [[LOOP]] ]
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; MT-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
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; MT: exit:
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; MT-NEXT: ret void
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;
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; ST-LABEL: @promote_captured_alloca(
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; ST-NEXT: entry:
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; ST-NEXT: [[A:%.*]] = alloca i32, align 4
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; ST-NEXT: call void @capture(ptr [[A]])
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; ST-NEXT: [[A_PROMOTED:%.*]] = load i32, ptr [[A]], align 4
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; ST-NEXT: br label [[LOOP:%.*]]
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; ST: loop:
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; ST-NEXT: [[V_INC2:%.*]] = phi i32 [ [[V_INC1:%.*]], [[LATCH:%.*]] ], [ [[A_PROMOTED]], [[ENTRY:%.*]] ]
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; ST-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LATCH]]
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; ST: if:
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; ST-NEXT: [[V_INC:%.*]] = add i32 [[V_INC2]], 1
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; ST-NEXT: br label [[LATCH]]
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; ST: latch:
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; ST-NEXT: [[V_INC1]] = phi i32 [ [[V_INC]], [[IF]] ], [ [[V_INC2]], [[LOOP]] ]
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; ST-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
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; ST: exit:
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; ST-NEXT: [[V_INC1_LCSSA:%.*]] = phi i32 [ [[V_INC1]], [[LATCH]] ]
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; ST-NEXT: store i32 [[V_INC1_LCSSA]], ptr [[A]], align 4
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; ST-NEXT: ret void
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;
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entry:
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%a = alloca i32
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call void @capture(ptr %a)
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br label %loop
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loop:
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br i1 %c, label %if, label %latch
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if:
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%v = load i32, ptr %a
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%v.inc = add i32 %v, 1
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store i32 %v.inc, ptr %a
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br label %latch
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latch:
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br i1 %c2, label %exit, label %loop
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exit:
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ret void
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}
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; The store cannot be promoted here, because we do not know whether the
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; argument memory is writable.
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define void @promote_arg(ptr noalias dereferenceable(4) align 4 %arg, i1 %c, i1 %c2) {
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; CHECK-LABEL: @promote_arg(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ARG_PROMOTED:%.*]] = load i32, ptr [[ARG:%.*]], align 4
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[V_INC2:%.*]] = phi i32 [ [[V_INC1:%.*]], [[LATCH:%.*]] ], [ [[ARG_PROMOTED]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[LATCH]]
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; CHECK: if:
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; CHECK-NEXT: [[V_INC:%.*]] = add i32 [[V_INC2]], 1
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; CHECK-NEXT: store i32 [[V_INC]], ptr [[ARG]], align 4
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; CHECK-NEXT: br label [[LATCH]]
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; CHECK: latch:
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; CHECK-NEXT: [[V_INC1]] = phi i32 [ [[V_INC]], [[IF]] ], [ [[V_INC2]], [[LOOP]] ]
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; CHECK-NEXT: br i1 [[C2:%.*]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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br i1 %c, label %if, label %latch
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if:
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%v = load i32, ptr %arg
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%v.inc = add i32 %v, 1
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store i32 %v.inc, ptr %arg
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br label %latch
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latch:
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br i1 %c2, label %exit, label %loop
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exit:
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ret void
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}
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