92 lines
4.4 KiB
LLVM
92 lines
4.4 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
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; RUN: opt -S -loop-reduce %s | FileCheck --check-prefixes=LEGACYPM %s
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; RUN: opt -S -passes=loop-reduce %s | FileCheck --check-prefixes=NEWPM %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define void @function_0(i32 %val_i32_8, i32 %val_i32_9) {
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; LEGACYPM-LABEL: define void @function_0
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; LEGACYPM-SAME: (i32 [[VAL_I32_8:%.*]], i32 [[VAL_I32_9:%.*]]) {
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; LEGACYPM-NEXT: [[VAL_I1_22:%.*]] = trunc i8 -66 to i1
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; LEGACYPM-NEXT: br i1 [[VAL_I1_22]], label [[BB_2_PREHEADER:%.*]], label [[BB_2_PREHEADER]]
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; LEGACYPM: bb_2.preheader:
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; LEGACYPM-NEXT: br label [[BB_2:%.*]]
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; LEGACYPM: bb_2:
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; LEGACYPM-NEXT: br label [[PRHDR_LOOP_3:%.*]]
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; LEGACYPM: prhdr_loop_3:
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; LEGACYPM-NEXT: br label [[LOOP_4:%.*]]
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; LEGACYPM: loop_4:
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; LEGACYPM-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[BE_6:%.*]] ], [ 7851, [[PRHDR_LOOP_3]] ]
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; LEGACYPM-NEXT: br i1 [[VAL_I1_22]], label [[BE_6]], label [[LOOP_EXIT_7SPLIT:%.*]]
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; LEGACYPM: bb_5:
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; LEGACYPM-NEXT: [[VAL_I32_40:%.*]] = mul i32 [[VAL_I32_9]], [[VAL_I32_24_LCSSA:%.*]]
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; LEGACYPM-NEXT: br label [[BB_2]]
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; LEGACYPM: be_6:
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; LEGACYPM-NEXT: [[LSR_IV_NEXT]] = add i32 [[LSR_IV]], 1
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; LEGACYPM-NEXT: br i1 [[VAL_I1_22]], label [[LOOP_4]], label [[BE_6_LOOP_EXIT_7_CRIT_EDGE:%.*]]
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; LEGACYPM: loop_exit_7split:
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; LEGACYPM-NEXT: [[LSR_IV_LCSSA:%.*]] = phi i32 [ [[LSR_IV]], [[LOOP_4]] ]
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; LEGACYPM-NEXT: br label [[LOOP_EXIT_7:%.*]]
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; LEGACYPM: be_6.loop_exit_7_crit_edge:
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; LEGACYPM-NEXT: [[LSR_IV_LCSSA1:%.*]] = phi i32 [ [[LSR_IV]], [[BE_6]] ]
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; LEGACYPM-NEXT: br label [[LOOP_EXIT_7]]
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; LEGACYPM: loop_exit_7:
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; LEGACYPM-NEXT: [[VAL_I32_24_LCSSA]] = phi i32 [ [[LSR_IV_LCSSA1]], [[BE_6_LOOP_EXIT_7_CRIT_EDGE]] ], [ [[LSR_IV_LCSSA]], [[LOOP_EXIT_7SPLIT]] ]
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; LEGACYPM-NEXT: br label [[BB_5:%.*]]
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;
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; NEWPM-LABEL: define void @function_0
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; NEWPM-SAME: (i32 [[VAL_I32_8:%.*]], i32 [[VAL_I32_9:%.*]]) {
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; NEWPM-NEXT: [[VAL_I1_22:%.*]] = trunc i8 -66 to i1
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; NEWPM-NEXT: br i1 [[VAL_I1_22]], label [[BB_2_PREHEADER:%.*]], label [[BB_2_PREHEADER]]
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; NEWPM: bb_2.preheader:
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; NEWPM-NEXT: br label [[BB_2:%.*]]
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; NEWPM: bb_2:
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; NEWPM-NEXT: br label [[PRHDR_LOOP_3:%.*]]
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; NEWPM: prhdr_loop_3:
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; NEWPM-NEXT: br label [[LOOP_4:%.*]]
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; NEWPM: loop_4:
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; NEWPM-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[BE_6:%.*]] ], [ 7851, [[PRHDR_LOOP_3]] ]
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; NEWPM-NEXT: br i1 [[VAL_I1_22]], label [[BE_6]], label [[LOOP_EXIT_7SPLIT:%.*]]
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; NEWPM: bb_5:
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; NEWPM-NEXT: [[VAL_I32_40:%.*]] = mul i32 [[VAL_I32_9]], [[VAL_I32_24_LCSSA:%.*]]
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; NEWPM-NEXT: br label [[BB_2]]
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; NEWPM: be_6:
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; NEWPM-NEXT: [[LSR_IV_NEXT]] = add i32 [[LSR_IV]], 1
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; NEWPM-NEXT: br i1 [[VAL_I1_22]], label [[LOOP_4]], label [[BE_6_LOOP_EXIT_7_CRIT_EDGE:%.*]]
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; NEWPM: loop_exit_7split:
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; NEWPM-NEXT: [[LSR_IV_LCSSA:%.*]] = phi i32 [ [[LSR_IV]], [[LOOP_4]] ]
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; NEWPM-NEXT: br label [[LOOP_EXIT_7:%.*]]
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; NEWPM: be_6.loop_exit_7_crit_edge:
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; NEWPM-NEXT: [[LSR_IV_LCSSA1:%.*]] = phi i32 [ [[LSR_IV]], [[BE_6]] ]
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; NEWPM-NEXT: br label [[LOOP_EXIT_7]]
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; NEWPM: loop_exit_7:
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; NEWPM-NEXT: [[VAL_I32_24_LCSSA]] = phi i32 [ [[LSR_IV_LCSSA1]], [[BE_6_LOOP_EXIT_7_CRIT_EDGE]] ], [ [[LSR_IV_LCSSA]], [[LOOP_EXIT_7SPLIT]] ]
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; NEWPM-NEXT: br label [[BB_5:%.*]]
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;
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%val_i1_22 = trunc i8 -66 to i1
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br i1 %val_i1_22, label %bb_2, label %bb_2
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bb_2: ; preds = %bb_5, %entry_1, %entry_1
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br label %prhdr_loop_3
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prhdr_loop_3: ; preds = %bb_2
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br label %loop_4
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loop_4: ; preds = %be_6, %prhdr_loop_3
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%loop_cnt_i32_11 = phi i32 [ 7850, %prhdr_loop_3 ], [ %val_i32_24, %be_6 ]
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%val_i32_24 = add i32 %loop_cnt_i32_11, 1
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br i1 %val_i1_22, label %be_6, label %loop_exit_7
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bb_5: ; preds = %loop_exit_7
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%val_i32_40 = mul i32 %val_i32_9, %val_i32_24.lcssa
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br label %bb_2
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be_6: ; preds = %loop_4
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br i1 %val_i1_22, label %loop_4, label %loop_exit_7
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loop_exit_7: ; preds = %be_6, %loop_4
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%val_i32_24.lcssa = phi i32 [ %val_i32_24, %be_6 ], [ %val_i32_24, %loop_4 ]
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br label %bb_5
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}
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