243 lines
7.8 KiB
LLVM
243 lines
7.8 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -passes=ipsccp -S %s | FileCheck %s
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define i8 @range_from_lshr(i8 %a) {
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; CHECK-LABEL: @range_from_lshr(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_SHR:%.*]] = lshr i8 [[A:%.*]], 1
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; CHECK-NEXT: [[ADD_1:%.*]] = add nuw i8 [[A_SHR]], 1
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; CHECK-NEXT: [[ADD_2:%.*]] = add nuw nsw i8 [[A_SHR]], -128
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; CHECK-NEXT: [[ADD_3:%.*]] = add nsw i8 [[A_SHR]], -127
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; CHECK-NEXT: [[ADD_4:%.*]] = add nsw i8 [[A_SHR]], -1
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; CHECK-NEXT: [[RES_1:%.*]] = xor i8 [[ADD_1]], [[ADD_2]]
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; CHECK-NEXT: [[RES_2:%.*]] = xor i8 [[RES_1]], [[ADD_3]]
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; CHECK-NEXT: [[RES_3:%.*]] = xor i8 [[RES_2]], [[ADD_4]]
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; CHECK-NEXT: ret i8 [[RES_3]]
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;
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entry:
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%a.shr = lshr i8 %a, 1
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%add.1 = add i8 %a.shr, 1
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%add.2 = add i8 %a.shr, 128
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%add.3 = add i8 %a.shr, 129
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%add.4 = add i8 %a.shr, -1
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%res.1 = xor i8 %add.1, %add.2
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%res.2 = xor i8 %res.1, %add.3
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%res.3 = xor i8 %res.2, %add.4
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ret i8 %res.3
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}
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define i8 @a_and_15_add_1(i8 %a) {
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; CHECK-LABEL: @a_and_15_add_1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_AND:%.*]] = and i8 [[A:%.*]], 15
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; CHECK-NEXT: [[ADD_1:%.*]] = add nuw nsw i8 [[A_AND]], 1
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; CHECK-NEXT: ret i8 [[ADD_1]]
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;
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entry:
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%a.and = and i8 %a, 15
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%add.1 = add i8 %a.and, 1
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ret i8 %add.1
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}
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define <4 x i8> @range_from_lshr_vec(<4 x i8> %a) {
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; CHECK-LABEL: @range_from_lshr_vec(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_SHR:%.*]] = lshr <4 x i8> [[A:%.*]], <i8 1, i8 2, i8 3, i8 4>
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; CHECK-NEXT: [[ADD_1:%.*]] = add <4 x i8> [[A_SHR]], <i8 1, i8 2, i8 3, i8 4>
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; CHECK-NEXT: ret <4 x i8> [[ADD_1]]
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;
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entry:
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%a.shr = lshr <4 x i8> %a, <i8 1, i8 2, i8 3, i8 4>
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%add.1 = add <4 x i8> %a.shr, <i8 1, i8 2, i8 3, i8 4>
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ret <4 x i8> %add.1
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}
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define <4 x i8> @range_from_lshr_vec_2(<4 x i8> %a) {
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; CHECK-LABEL: @range_from_lshr_vec_2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A_SHR:%.*]] = lshr <4 x i8> [[A:%.*]], <i8 1, i8 1, i8 1, i8 1>
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; CHECK-NEXT: [[ADD_1:%.*]] = add <4 x i8> [[A_SHR]], <i8 2, i8 2, i8 2, i8 2>
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; CHECK-NEXT: ret <4 x i8> [[ADD_1]]
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;
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entry:
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%a.shr = lshr <4 x i8> %a, <i8 1, i8 1, i8 1, i8 1>
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%add.1 = add <4 x i8> %a.shr, <i8 2, i8 2, i8 2, i8 2>
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ret <4 x i8> %add.1
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}
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define i8 @sge_0_and_sle_90(i8 %a) {
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; CHECK-LABEL: @sge_0_and_sle_90(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[SGT:%.*]] = icmp sge i8 [[A:%.*]], 0
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; CHECK-NEXT: [[SLT:%.*]] = icmp sle i8 [[A]], 90
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; CHECK-NEXT: [[AND:%.*]] = and i1 [[SGT]], [[SLT]]
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; CHECK-NEXT: br i1 [[AND]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[ADD_1:%.*]] = add nuw nsw i8 [[A]], 1
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; CHECK-NEXT: [[ADD_2:%.*]] = add nsw i8 [[A]], -1
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; CHECK-NEXT: [[ADD_3:%.*]] = add nuw nsw i8 [[A]], -91
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; CHECK-NEXT: [[ADD_4:%.*]] = add nsw i8 [[A]], -90
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; CHECK-NEXT: [[RES_1:%.*]] = xor i8 [[ADD_1]], [[ADD_2]]
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; CHECK-NEXT: [[RES_2:%.*]] = xor i8 [[RES_1]], [[ADD_3]]
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; CHECK-NEXT: [[RES_3:%.*]] = xor i8 [[RES_2]], [[ADD_4]]
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; CHECK-NEXT: ret i8 [[RES_3]]
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; CHECK: else:
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; CHECK-NEXT: [[ADD_5:%.*]] = add i8 [[A]], 1
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; CHECK-NEXT: [[ADD_6:%.*]] = add i8 [[A]], -1
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; CHECK-NEXT: [[ADD_7:%.*]] = add i8 [[A]], -91
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; CHECK-NEXT: [[ADD_8:%.*]] = add i8 [[A]], -90
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; CHECK-NEXT: [[RES_4:%.*]] = xor i8 [[ADD_5]], [[ADD_6]]
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; CHECK-NEXT: [[RES_5:%.*]] = xor i8 [[RES_4]], [[ADD_7]]
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; CHECK-NEXT: [[RES_6:%.*]] = xor i8 [[RES_5]], [[ADD_8]]
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; CHECK-NEXT: ret i8 [[RES_6]]
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;
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entry:
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%sgt = icmp sge i8 %a, 0
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%slt = icmp sle i8 %a, 90
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%and = and i1 %sgt, %slt
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br i1 %and, label %then, label %else
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then:
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%add.1 = add i8 %a, 1
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%add.2 = add i8 %a, -1
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%add.3 = add i8 %a, 165
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%add.4 = add i8 %a, 166
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%res.1 = xor i8 %add.1, %add.2
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%res.2 = xor i8 %res.1, %add.3
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%res.3 = xor i8 %res.2, %add.4
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ret i8 %res.3
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else:
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%add.5 = add i8 %a, 1
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%add.6 = add i8 %a, -1
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%add.7 = add i8 %a, 165
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%add.8 = add i8 %a, 166
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%res.4 = xor i8 %add.5, %add.6
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%res.5 = xor i8 %res.4, %add.7
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%res.6 = xor i8 %res.5, %add.8
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ret i8 %res.6
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}
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define i16 @sge_with_sext_to_zext_conversion(i8 %a) {
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; CHECK-LABEL: @sge_with_sext_to_zext_conversion(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 [[A:%.*]], 0
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; CHECK-NEXT: br i1 [[CMP]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[SEXT:%.*]] = zext nneg i8 [[A]] to i16
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; CHECK-NEXT: [[ADD_1:%.*]] = add i16 [[SEXT]], 1
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; CHECK-NEXT: [[ADD_2:%.*]] = add i16 [[SEXT]], -128
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; CHECK-NEXT: [[ADD_3:%.*]] = add i16 [[SEXT]], -127
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; CHECK-NEXT: [[RES_1:%.*]] = xor i16 [[ADD_1]], [[ADD_2]]
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; CHECK-NEXT: [[RES_2:%.*]] = xor i16 [[RES_1]], [[ADD_3]]
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; CHECK-NEXT: ret i16 [[RES_2]]
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; CHECK: else:
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; CHECK-NEXT: [[SEXT_2:%.*]] = sext i8 [[A]] to i16
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; CHECK-NEXT: [[ADD_4:%.*]] = add nsw i16 [[SEXT_2]], 1
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; CHECK-NEXT: [[ADD_5:%.*]] = add nsw i16 [[SEXT_2]], -128
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; CHECK-NEXT: [[ADD_6:%.*]] = add nsw i16 [[SEXT_2]], -127
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; CHECK-NEXT: [[RES_3:%.*]] = xor i16 [[ADD_4]], [[ADD_5]]
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; CHECK-NEXT: [[RES_4:%.*]] = xor i16 [[RES_3]], [[ADD_6]]
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; CHECK-NEXT: ret i16 [[RES_4]]
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;
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entry:
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%cmp = icmp sgt i8 %a, 0
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br i1 %cmp, label %then, label %else
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then:
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%sext = sext i8 %a to i16
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%add.1 = add i16 %sext, 1
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%add.2 = add i16 %sext, 65408
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%add.3 = add i16 %sext, 65409
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%res.1 = xor i16 %add.1, %add.2
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%res.2 = xor i16 %res.1, %add.3
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ret i16 %res.2
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else:
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%sext.2 = sext i8 %a to i16
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%add.4 = add i16 %sext.2, 1
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%add.5 = add i16 %sext.2, 65408
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%add.6 = add i16 %sext.2, 65409
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%res.3 = xor i16 %add.4, %add.5
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%res.4 = xor i16 %res.3, %add.6
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ret i16 %res.4
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}
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@c = internal global <6 x i8> zeroinitializer, align 8
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; Test case for PR60280.
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define <6 x i8> @vector_constant_replacement_in_add(<6 x i8> %a) {
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; CHECK-LABEL: @vector_constant_replacement_in_add(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD:%.*]] = add <6 x i8> [[A:%.*]], zeroinitializer
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; CHECK-NEXT: ret <6 x i8> [[ADD]]
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;
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entry:
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%c = load <6 x i8>, ptr @c, align 8
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%add = add <6 x i8> %a, %c
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ret <6 x i8> %add
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}
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declare i32 @callee()
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; Test case for PR60278.
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define i64 @constant_ptrtoint_replacement(i64 %a) {
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; CHECK-LABEL: @constant_ptrtoint_replacement(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[RES:%.*]] = add i64 [[A:%.*]], ptrtoint (ptr @callee to i64)
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; CHECK-NEXT: ret i64 [[RES]]
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;
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entry:
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%fn.addr = ptrtoint ptr @callee to i64
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%res = add i64 %a, %fn.addr
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ret i64 %res
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}
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define internal <4 x i8> @test_propagate_argument(<4 x i8> %a, <4 x i8> %b) {
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; CHECK-LABEL: @test_propagate_argument(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[ADD:%.*]] = add <4 x i8> [[A:%.*]], <i8 3, i8 3, i8 3, i8 3>
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; CHECK-NEXT: ret <4 x i8> [[ADD]]
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;
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entry:
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%add = add <4 x i8> %a, %b
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ret <4 x i8> %add
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}
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define <4 x i8> @test_propagate_caller(<4 x i8> %a) {
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; CHECK-LABEL: @test_propagate_caller(
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; CHECK-NEXT: [[RES_1:%.*]] = call <4 x i8> @test_propagate_argument(<4 x i8> [[A:%.*]], <4 x i8> <i8 3, i8 3, i8 3, i8 3>)
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; CHECK-NEXT: ret <4 x i8> [[RES_1]]
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;
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%add = add <4 x i8> <i8 1, i8 1, i8 1, i8 1>, <i8 2, i8 2, i8 2, i8 2>
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%res.1 = call <4 x i8> @test_propagate_argument(<4 x i8> %a, <4 x i8> %add)
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ret <4 x i8> %res.1
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}
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define i16 @test_add_in_different_block(i1 %c, i8 %a) {
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; CHECK-LABEL: @test_add_in_different_block(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[A:%.*]], 0
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; CHECK-NEXT: [[COND4:%.*]] = select i1 [[CMP]], i8 1, i8 0
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; CHECK-NEXT: [[CONV:%.*]] = zext nneg i8 [[COND4]] to i16
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; CHECK-NEXT: br i1 [[C:%.*]], label [[THEN:%.*]], label [[ELSE:%.*]]
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; CHECK: then:
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; CHECK-NEXT: [[ADD:%.*]] = add i16 1, [[CONV]]
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; CHECK-NEXT: ret i16 [[ADD]]
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; CHECK: else:
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; CHECK-NEXT: ret i16 0
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;
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entry:
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%cmp = icmp eq i8 %a, 0
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%cond4 = select i1 %cmp, i8 1, i8 0
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%conv = sext i8 %cond4 to i16
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br i1 %c, label %then, label %else
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then:
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%add = add i16 1, %conv
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ret i16 %add
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else:
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ret i16 0
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}
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