67 lines
2.2 KiB
ArmAsm
67 lines
2.2 KiB
ArmAsm
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@@ Check that PC-relative memory addressing is annotated
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@ RUN: llvm-mc %s -triple=armv7 -filetype=obj | \
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@ RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --triple=armv7 - | \
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@ RUN: FileCheck %s
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.text
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foo:
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@ CHECK: 00000000 <foo>:
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.word 0x01020304
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_start:
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@ CHECK: 00000004 <_start>:
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@@ Check a special case immediate for AddrMode_i12
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ldr r1, [pc, #-0]
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@ CHECK-NEXT: 4: ldr r1, [pc, #-0] @ 0xc <_start+0x8>
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@@ Check AddrMode_i12 instructions, with positive and negative immediates
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ldr r0, foo
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ldrb r0, bar
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pli _start
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pld bar
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@ CHECK-NEXT: 8: ldr r0, [pc, #-16] @ 0x0 <foo>
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@ CHECK-NEXT: c: ldrb r0, [pc, #48] @ 0x44 <bar>
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@ CHECK-NEXT: 10: pli [pc, #-20] @ 0x4 <_start>
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@ CHECK-NEXT: 14: pld [pc, #40] @ 0x44 <bar>
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@@ Check that AddrMode_i12 instructions that do not use PC-relative addressing
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@@ are not annotated
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ldr r0, [r1, #8]
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@ CHECK-NEXT: 18: ldr r0, [r1, #8]{{$}}
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@@ Check AddrMode3 instructions, with positive and negative immediates
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ldrd r0, r1, foo
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ldrh r0, bar
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@ CHECK-NEXT: 1c: ldrd r0, r1, [pc, #-36] @ 0x0 <foo>
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@ CHECK-NEXT: 20: ldrh r0, [pc, #28] @ 0x44 <bar>
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@@ Check that AddrMode3 instruction that do not use PC+imm addressing are not
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@@ annotated
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ldrh r0, [r1, #8]
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ldrh r0, [pc, r2]
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@ CHECK-NEXT: 24: ldrh r0, [r1, #8]{{$}}
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@ CHECK-NEXT: 28: ldrh r0, [pc, r2]{{$}}
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@@ Check AddrMode5 instructions, with positive and negative immediates
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ldc p14, c5, foo
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ldcl p6, c4, bar
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ldc2 p5, c2, foo
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ldc2l p3, c1, bar
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@ CHECK-NEXT: 2c: ldc p14, c5, [pc, #-52] @ 0x0 <foo>
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@ CHECK-NEXT: 30: ldcl p6, c4, [pc, #12] @ 0x44 <bar>
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@ CHECK-NEXT: 34: ldc2 p5, c2, [pc, #-60] @ 0x0 <foo>
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@ CHECK-NEXT: 38: ldc2l p3, c1, [pc, #4] @ 0x44 <bar>
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@@ Check that AddrMode5 instruction that do not use PC+imm addressing are not
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@@ annotated
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ldc p14, c5, [r1, #8]
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ldc p14, c5, [pc], {16}
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@ CHECK-NEXT: 3c: ldc p14, c5, [r1, #8]{{$}}
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@ CHECK-NEXT: 40: ldc p14, c5, [pc], {16}{{$}}
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bar:
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@ CHECK: 00000044 <bar>:
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.word 0x01020304
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