23 lines
785 B
TableGen
23 lines
785 B
TableGen
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//==-- GPUToROCDL.td - GPU Ops to ROCDL Patterns -------------*- tablegen -*==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// Defines Patterns to lower GPU ops to ROCDL.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MLIR_CONVERSION_GPUTOROCDL_TD
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#define MLIR_CONVERSION_GPUTOROCDL_TD
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include "mlir/IR/PatternBase.td"
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include "mlir/Dialect/GPU/IR/GPUOps.td"
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include "mlir/Dialect/LLVMIR/ROCDLOps.td"
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def : Pat<(GPU_BarrierOp), (ROCDL_BarrierOp)>;
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#endif // MLIR_CONVERSION_GPUTOROCDL_TD
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