419 lines
17 KiB
C++
419 lines
17 KiB
C++
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//===- IndexToSPIRV.cpp - Index to SPIRV dialect conversion -----*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Conversion/IndexToSPIRV/IndexToSPIRV.h"
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#include "../SPIRVCommon/Pattern.h"
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#include "mlir/Dialect/Index/IR/IndexDialect.h"
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#include "mlir/Dialect/Index/IR/IndexOps.h"
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#include "mlir/Dialect/SPIRV/IR/SPIRVDialect.h"
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#include "mlir/Dialect/SPIRV/IR/SPIRVOps.h"
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#include "mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h"
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#include "mlir/Pass/Pass.h"
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using namespace mlir;
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using namespace index;
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namespace {
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//===----------------------------------------------------------------------===//
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// Trivial Conversions
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//===----------------------------------------------------------------------===//
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using ConvertIndexAdd = spirv::ElementwiseOpPattern<AddOp, spirv::IAddOp>;
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using ConvertIndexSub = spirv::ElementwiseOpPattern<SubOp, spirv::ISubOp>;
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using ConvertIndexMul = spirv::ElementwiseOpPattern<MulOp, spirv::IMulOp>;
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using ConvertIndexDivS = spirv::ElementwiseOpPattern<DivSOp, spirv::SDivOp>;
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using ConvertIndexDivU = spirv::ElementwiseOpPattern<DivUOp, spirv::UDivOp>;
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using ConvertIndexRemS = spirv::ElementwiseOpPattern<RemSOp, spirv::SRemOp>;
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using ConvertIndexRemU = spirv::ElementwiseOpPattern<RemUOp, spirv::UModOp>;
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using ConvertIndexMaxS = spirv::ElementwiseOpPattern<MaxSOp, spirv::GLSMaxOp>;
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using ConvertIndexMaxU = spirv::ElementwiseOpPattern<MaxUOp, spirv::GLUMaxOp>;
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using ConvertIndexMinS = spirv::ElementwiseOpPattern<MinSOp, spirv::GLSMinOp>;
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using ConvertIndexMinU = spirv::ElementwiseOpPattern<MinUOp, spirv::GLUMinOp>;
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using ConvertIndexShl =
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spirv::ElementwiseOpPattern<ShlOp, spirv::ShiftLeftLogicalOp>;
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using ConvertIndexShrS =
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spirv::ElementwiseOpPattern<ShrSOp, spirv::ShiftRightArithmeticOp>;
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using ConvertIndexShrU =
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spirv::ElementwiseOpPattern<ShrUOp, spirv::ShiftRightLogicalOp>;
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/// It is the case that when we convert bitwise operations to SPIR-V operations
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/// we must take into account the special pattern in SPIR-V that if the
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/// operands are boolean values, then SPIR-V uses `SPIRVLogicalOp`. Otherwise,
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/// for non-boolean operands, SPIR-V should use `SPIRVBitwiseOp`. However,
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/// index.add is never a boolean operation so we can directly convert it to the
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/// Bitwise[And|Or]Op.
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using ConvertIndexAnd = spirv::ElementwiseOpPattern<AndOp, spirv::BitwiseAndOp>;
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using ConvertIndexOr = spirv::ElementwiseOpPattern<OrOp, spirv::BitwiseOrOp>;
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using ConvertIndexXor = spirv::ElementwiseOpPattern<XOrOp, spirv::BitwiseXorOp>;
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//===----------------------------------------------------------------------===//
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// ConvertConstantBool
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//===----------------------------------------------------------------------===//
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// Converts index.bool.constant operation to spirv.Constant.
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struct ConvertIndexConstantBoolOpPattern final
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: OpConversionPattern<BoolConstantOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(BoolConstantOp op, BoolConstantOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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rewriter.replaceOpWithNewOp<spirv::ConstantOp>(op, op.getType(),
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op.getValueAttr());
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertConstant
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//===----------------------------------------------------------------------===//
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// Converts index.constant op to spirv.Constant. Will truncate from i64 to i32
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// when required.
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struct ConvertIndexConstantOpPattern final : OpConversionPattern<ConstantOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(ConstantOp op, ConstantOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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auto *typeConverter = this->template getTypeConverter<SPIRVTypeConverter>();
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Type indexType = typeConverter->getIndexType();
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APInt value = op.getValue().trunc(typeConverter->getIndexTypeBitwidth());
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rewriter.replaceOpWithNewOp<spirv::ConstantOp>(
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op, indexType, IntegerAttr::get(indexType, value));
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertIndexCeilDivS
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//===----------------------------------------------------------------------===//
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/// Convert `ceildivs(n, m)` into `x = m > 0 ? -1 : 1` and then
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/// `n*m > 0 ? (n+x)/m + 1 : -(-n/m)`. Formula taken from the equivalent
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/// conversion in IndexToLLVM.
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struct ConvertIndexCeilDivSPattern final : OpConversionPattern<CeilDivSOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(CeilDivSOp op, CeilDivSOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op.getLoc();
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Value n = adaptor.getLhs();
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Type n_type = n.getType();
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Value m = adaptor.getRhs();
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// Define the constants
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Value zero = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 0));
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Value posOne = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 1));
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Value negOne = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, -1));
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// Compute `x`.
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Value mPos = rewriter.create<spirv::SGreaterThanOp>(loc, m, zero);
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Value x = rewriter.create<spirv::SelectOp>(loc, mPos, negOne, posOne);
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// Compute the positive result.
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Value nPlusX = rewriter.create<spirv::IAddOp>(loc, n, x);
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Value nPlusXDivM = rewriter.create<spirv::SDivOp>(loc, nPlusX, m);
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Value posRes = rewriter.create<spirv::IAddOp>(loc, nPlusXDivM, posOne);
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// Compute the negative result.
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Value negN = rewriter.create<spirv::ISubOp>(loc, zero, n);
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Value negNDivM = rewriter.create<spirv::SDivOp>(loc, negN, m);
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Value negRes = rewriter.create<spirv::ISubOp>(loc, zero, negNDivM);
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// Pick the positive result if `n` and `m` have the same sign and `n` is
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// non-zero, i.e. `(n > 0) == (m > 0) && n != 0`.
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Value nPos = rewriter.create<spirv::SGreaterThanOp>(loc, n, zero);
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Value sameSign = rewriter.create<spirv::LogicalEqualOp>(loc, nPos, mPos);
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Value nNonZero = rewriter.create<spirv::INotEqualOp>(loc, n, zero);
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Value cmp = rewriter.create<spirv::LogicalAndOp>(loc, sameSign, nNonZero);
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rewriter.replaceOpWithNewOp<spirv::SelectOp>(op, cmp, posRes, negRes);
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertIndexCeilDivU
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//===----------------------------------------------------------------------===//
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/// Convert `ceildivu(n, m)` into `n == 0 ? 0 : (n-1)/m + 1`. Formula taken
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/// from the equivalent conversion in IndexToLLVM.
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struct ConvertIndexCeilDivUPattern final : OpConversionPattern<CeilDivUOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(CeilDivUOp op, CeilDivUOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op.getLoc();
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Value n = adaptor.getLhs();
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Type n_type = n.getType();
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Value m = adaptor.getRhs();
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// Define the constants
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Value zero = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 0));
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Value one = rewriter.create<spirv::ConstantOp>(loc, n_type,
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IntegerAttr::get(n_type, 1));
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// Compute the non-zero result.
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Value minusOne = rewriter.create<spirv::ISubOp>(loc, n, one);
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Value quotient = rewriter.create<spirv::UDivOp>(loc, minusOne, m);
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Value plusOne = rewriter.create<spirv::IAddOp>(loc, quotient, one);
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// Pick the result
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Value cmp = rewriter.create<spirv::IEqualOp>(loc, n, zero);
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rewriter.replaceOpWithNewOp<spirv::SelectOp>(op, cmp, zero, plusOne);
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertIndexFloorDivS
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//===----------------------------------------------------------------------===//
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/// Convert `floordivs(n, m)` into `x = m < 0 ? 1 : -1` and then
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/// `n*m < 0 ? -1 - (x-n)/m : n/m`. Formula taken from the equivalent conversion
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/// in IndexToLLVM.
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struct ConvertIndexFloorDivSPattern final : OpConversionPattern<FloorDivSOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(FloorDivSOp op, FloorDivSOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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Location loc = op.getLoc();
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Value n = adaptor.getLhs();
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Type n_type = n.getType();
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Value m = adaptor.getRhs();
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// Define the constants
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Value zero = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 0));
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Value posOne = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, 1));
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Value negOne = rewriter.create<spirv::ConstantOp>(
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loc, n_type, IntegerAttr::get(n_type, -1));
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// Compute `x`.
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Value mNeg = rewriter.create<spirv::SLessThanOp>(loc, m, zero);
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Value x = rewriter.create<spirv::SelectOp>(loc, mNeg, posOne, negOne);
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// Compute the negative result
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Value xMinusN = rewriter.create<spirv::ISubOp>(loc, x, n);
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Value xMinusNDivM = rewriter.create<spirv::SDivOp>(loc, xMinusN, m);
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Value negRes = rewriter.create<spirv::ISubOp>(loc, negOne, xMinusNDivM);
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// Compute the positive result.
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Value posRes = rewriter.create<spirv::SDivOp>(loc, n, m);
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// Pick the negative result if `n` and `m` have different signs and `n` is
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// non-zero, i.e. `(n < 0) != (m < 0) && n != 0`.
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Value nNeg = rewriter.create<spirv::SLessThanOp>(loc, n, zero);
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Value diffSign = rewriter.create<spirv::LogicalNotEqualOp>(loc, nNeg, mNeg);
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Value nNonZero = rewriter.create<spirv::INotEqualOp>(loc, n, zero);
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Value cmp = rewriter.create<spirv::LogicalAndOp>(loc, diffSign, nNonZero);
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rewriter.replaceOpWithNewOp<spirv::SelectOp>(op, cmp, posRes, negRes);
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return success();
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertIndexCast
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//===----------------------------------------------------------------------===//
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/// Convert a cast op. If the materialized index type is the same as the other
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/// type, fold away the op. Otherwise, use the Convert SPIR-V operation.
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/// Signed casts sign extend when the result bitwidth is larger. Unsigned casts
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/// zero extend when the result bitwidth is larger.
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template <typename CastOp, typename ConvertOp>
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struct ConvertIndexCast final : OpConversionPattern<CastOp> {
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using OpConversionPattern<CastOp>::OpConversionPattern;
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LogicalResult
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matchAndRewrite(CastOp op, typename CastOp::Adaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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auto *typeConverter = this->template getTypeConverter<SPIRVTypeConverter>();
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Type indexType = typeConverter->getIndexType();
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Type srcType = adaptor.getInput().getType();
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Type dstType = op.getType();
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if (isa<IndexType>(srcType)) {
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srcType = indexType;
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}
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if (isa<IndexType>(dstType)) {
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dstType = indexType;
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}
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if (srcType == dstType) {
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rewriter.replaceOp(op, adaptor.getInput());
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} else {
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rewriter.template replaceOpWithNewOp<ConvertOp>(op, dstType,
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adaptor.getOperands());
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}
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return success();
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}
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};
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using ConvertIndexCastS = ConvertIndexCast<CastSOp, spirv::SConvertOp>;
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using ConvertIndexCastU = ConvertIndexCast<CastUOp, spirv::UConvertOp>;
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//===----------------------------------------------------------------------===//
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// ConvertIndexCmp
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//===----------------------------------------------------------------------===//
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// Helper template to replace the operation
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template <typename ICmpOp>
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static LogicalResult rewriteCmpOp(CmpOp op, CmpOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) {
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rewriter.replaceOpWithNewOp<ICmpOp>(op, adaptor.getLhs(), adaptor.getRhs());
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return success();
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}
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struct ConvertIndexCmpPattern final : OpConversionPattern<CmpOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(CmpOp op, CmpOpAdaptor adaptor,
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ConversionPatternRewriter &rewriter) const override {
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// We must convert the predicates to the corresponding int comparions.
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switch (op.getPred()) {
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case IndexCmpPredicate::EQ:
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return rewriteCmpOp<spirv::IEqualOp>(op, adaptor, rewriter);
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case IndexCmpPredicate::NE:
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return rewriteCmpOp<spirv::INotEqualOp>(op, adaptor, rewriter);
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case IndexCmpPredicate::SGE:
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return rewriteCmpOp<spirv::SGreaterThanEqualOp>(op, adaptor, rewriter);
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case IndexCmpPredicate::SGT:
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return rewriteCmpOp<spirv::SGreaterThanOp>(op, adaptor, rewriter);
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case IndexCmpPredicate::SLE:
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return rewriteCmpOp<spirv::SLessThanEqualOp>(op, adaptor, rewriter);
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case IndexCmpPredicate::SLT:
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return rewriteCmpOp<spirv::SLessThanOp>(op, adaptor, rewriter);
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case IndexCmpPredicate::UGE:
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return rewriteCmpOp<spirv::UGreaterThanEqualOp>(op, adaptor, rewriter);
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case IndexCmpPredicate::UGT:
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return rewriteCmpOp<spirv::UGreaterThanOp>(op, adaptor, rewriter);
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case IndexCmpPredicate::ULE:
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return rewriteCmpOp<spirv::ULessThanEqualOp>(op, adaptor, rewriter);
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case IndexCmpPredicate::ULT:
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return rewriteCmpOp<spirv::ULessThanOp>(op, adaptor, rewriter);
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}
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}
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};
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//===----------------------------------------------------------------------===//
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// ConvertIndexSizeOf
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//===----------------------------------------------------------------------===//
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/// Lower `index.sizeof` to a constant with the value of the index bitwidth.
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struct ConvertIndexSizeOf final : OpConversionPattern<SizeOfOp> {
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using OpConversionPattern::OpConversionPattern;
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LogicalResult
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matchAndRewrite(SizeOfOp op, SizeOfOpAdaptor adaptor,
|
||
|
|
ConversionPatternRewriter &rewriter) const override {
|
||
|
|
auto *typeConverter = this->template getTypeConverter<SPIRVTypeConverter>();
|
||
|
|
Type indexType = typeConverter->getIndexType();
|
||
|
|
unsigned bitwidth = typeConverter->getIndexTypeBitwidth();
|
||
|
|
rewriter.replaceOpWithNewOp<spirv::ConstantOp>(
|
||
|
|
op, indexType, IntegerAttr::get(indexType, bitwidth));
|
||
|
|
return success();
|
||
|
|
}
|
||
|
|
};
|
||
|
|
} // namespace
|
||
|
|
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
// Pattern Population
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
|
||
|
|
void index::populateIndexToSPIRVPatterns(SPIRVTypeConverter &typeConverter,
|
||
|
|
RewritePatternSet &patterns) {
|
||
|
|
patterns.add<
|
||
|
|
// clang-format off
|
||
|
|
ConvertIndexAdd,
|
||
|
|
ConvertIndexSub,
|
||
|
|
ConvertIndexMul,
|
||
|
|
ConvertIndexDivS,
|
||
|
|
ConvertIndexDivU,
|
||
|
|
ConvertIndexRemS,
|
||
|
|
ConvertIndexRemU,
|
||
|
|
ConvertIndexMaxS,
|
||
|
|
ConvertIndexMaxU,
|
||
|
|
ConvertIndexMinS,
|
||
|
|
ConvertIndexMinU,
|
||
|
|
ConvertIndexShl,
|
||
|
|
ConvertIndexShrS,
|
||
|
|
ConvertIndexShrU,
|
||
|
|
ConvertIndexAnd,
|
||
|
|
ConvertIndexOr,
|
||
|
|
ConvertIndexXor,
|
||
|
|
ConvertIndexConstantBoolOpPattern,
|
||
|
|
ConvertIndexConstantOpPattern,
|
||
|
|
ConvertIndexCeilDivSPattern,
|
||
|
|
ConvertIndexCeilDivUPattern,
|
||
|
|
ConvertIndexFloorDivSPattern,
|
||
|
|
ConvertIndexCastS,
|
||
|
|
ConvertIndexCastU,
|
||
|
|
ConvertIndexCmpPattern,
|
||
|
|
ConvertIndexSizeOf
|
||
|
|
>(typeConverter, patterns.getContext());
|
||
|
|
}
|
||
|
|
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
// ODS-Generated Definitions
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
|
||
|
|
namespace mlir {
|
||
|
|
#define GEN_PASS_DEF_CONVERTINDEXTOSPIRVPASS
|
||
|
|
#include "mlir/Conversion/Passes.h.inc"
|
||
|
|
} // namespace mlir
|
||
|
|
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
// Pass Definition
|
||
|
|
//===----------------------------------------------------------------------===//
|
||
|
|
|
||
|
|
namespace {
|
||
|
|
struct ConvertIndexToSPIRVPass
|
||
|
|
: public impl::ConvertIndexToSPIRVPassBase<ConvertIndexToSPIRVPass> {
|
||
|
|
using Base::Base;
|
||
|
|
|
||
|
|
void runOnOperation() override {
|
||
|
|
Operation *op = getOperation();
|
||
|
|
spirv::TargetEnvAttr targetAttr = spirv::lookupTargetEnvOrDefault(op);
|
||
|
|
std::unique_ptr<SPIRVConversionTarget> target =
|
||
|
|
SPIRVConversionTarget::get(targetAttr);
|
||
|
|
|
||
|
|
SPIRVConversionOptions options;
|
||
|
|
options.use64bitIndex = this->use64bitIndex;
|
||
|
|
SPIRVTypeConverter typeConverter(targetAttr, options);
|
||
|
|
|
||
|
|
// Use UnrealizedConversionCast as the bridge so that we don't need to pull
|
||
|
|
// in patterns for other dialects.
|
||
|
|
target->addLegalOp<UnrealizedConversionCastOp>();
|
||
|
|
|
||
|
|
// Allow the spirv operations we are converting to
|
||
|
|
target->addLegalDialect<spirv::SPIRVDialect>();
|
||
|
|
// Fail hard when there are any remaining 'index' ops.
|
||
|
|
target->addIllegalDialect<index::IndexDialect>();
|
||
|
|
|
||
|
|
RewritePatternSet patterns(&getContext());
|
||
|
|
index::populateIndexToSPIRVPatterns(typeConverter, patterns);
|
||
|
|
|
||
|
|
if (failed(applyPartialConversion(op, *target, std::move(patterns))))
|
||
|
|
signalPassFailure();
|
||
|
|
}
|
||
|
|
};
|
||
|
|
} // namespace
|