119 lines
4.4 KiB
C++
119 lines
4.4 KiB
C++
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//===- Utils.cpp - Utilities to support the Tensor dialect ----------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements utilities for the Tensor dialect.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/Tensor/Utils/Utils.h"
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#include "mlir/Dialect/Affine/IR/AffineOps.h"
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#include "mlir/Dialect/Arith/IR/Arith.h"
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#include "mlir/Dialect/Arith/Utils/Utils.h"
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#include "mlir/Dialect/Utils/IndexingUtils.h"
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#include "mlir/Interfaces/ValueBoundsOpInterface.h"
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using namespace mlir;
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using namespace mlir::tensor;
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PadOp mlir::tensor::createPadHighOp(RankedTensorType type, Value source,
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Value pad, bool nofold, Location loc,
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OpBuilder &b) {
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SmallVector<OpFoldResult> low(type.getRank(), b.getIndexAttr(0));
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SmallVector<OpFoldResult> high(type.getRank(), b.getIndexAttr(0));
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for (const auto &en : enumerate(type.getShape())) {
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// Pad only the static dimensions of the result tensor type.
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if (ShapedType::isDynamic(en.value()))
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continue;
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// Compute the padding width.
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AffineExpr d0;
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bindDims(b.getContext(), d0);
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OpFoldResult sz = tensor::getMixedSize(b, loc, source, en.index());
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high[en.index()] =
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affine::makeComposedFoldedAffineApply(b, loc, en.value() - d0, {sz});
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}
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return b.create<PadOp>(loc, type, source, low, high, pad, nofold);
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}
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SmallVector<Value> mlir::tensor::createDynamicDimValues(OpBuilder &b,
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Location loc,
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Value rankedTensor) {
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auto tensorTy = cast<RankedTensorType>(rankedTensor.getType());
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SmallVector<Value> dynamicDims;
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for (const auto &en : llvm::enumerate(tensorTy.getShape())) {
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if (en.value() == ShapedType::kDynamic)
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dynamicDims.push_back(
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b.create<tensor::DimOp>(loc, rankedTensor, en.index()));
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}
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return dynamicDims;
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}
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FailureOr<RankedTensorType>
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mlir::tensor::computeTransposedType(RankedTensorType rankedTensorType,
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ArrayRef<int64_t> transposeVector) {
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if (transposeVector.empty())
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return rankedTensorType;
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if (!isPermutationVector(transposeVector) ||
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transposeVector.size() != static_cast<size_t>(rankedTensorType.getRank()))
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return failure();
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SmallVector<int64_t> transposedShape(rankedTensorType.getShape().begin(),
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rankedTensorType.getShape().end());
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applyPermutationToVector(transposedShape, transposeVector);
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using RTTBuilder = RankedTensorType::Builder;
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RankedTensorType transposedTensorType =
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RTTBuilder(rankedTensorType).setShape(transposedShape);
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return transposedTensorType;
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}
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bool mlir::tensor::isCastLikeInsertSliceOp(InsertSliceOp op) {
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llvm::SmallBitVector droppedDims = op.getDroppedDims();
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int64_t srcDim = 0;
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// Source dims and destination dims (apart from dropped dims) must have the
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// same size.
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for (int64_t resultDim = 0; resultDim < op.getDestType().getRank();
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++resultDim) {
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if (droppedDims.test(resultDim)) {
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continue;
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}
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FailureOr<bool> equalDimSize = ValueBoundsConstraintSet::areEqual(
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op.getSource(), op.getResult(), srcDim, resultDim);
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if (failed(equalDimSize) || !*equalDimSize)
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return false;
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++srcDim;
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}
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return true;
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}
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bool mlir::tensor::isCastLikeExtractSliceOp(ExtractSliceOp op) {
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llvm::SmallBitVector droppedDims = op.getDroppedDims();
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int64_t resultDim = 0;
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// Source dims and result dims (apart from dropped dims) must have the same
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// size.
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RankedTensorType sourceType = op.getSourceType();
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for (int64_t dim = 0, e = sourceType.getRank(); dim < e; ++dim) {
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if (droppedDims.test(dim)) {
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// ExtractSlice may drop unit dimensions that result from taking a size-1
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// slice from a non-size-1 source dimension.
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if (sourceType.getDimSize(dim) != 1)
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return false;
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continue;
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}
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FailureOr<bool> equalDimSize = ValueBoundsConstraintSet::areEqual(
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op.getSource(), op.getResult(), dim, resultDim);
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if (failed(equalDimSize) || !*equalDimSize)
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return false;
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++resultDim;
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}
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return true;
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}
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