86 lines
3 KiB
MLIR
86 lines
3 KiB
MLIR
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// RUN: mlir-opt %s -split-input-file -convert-gpu-to-rocdl | FileCheck %s --check-prefixes=CHECK,ROCDL
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// RUN: mlir-opt %s -split-input-file -convert-gpu-to-nvvm | FileCheck %s --check-prefixes=CHECK,NVVM
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gpu.module @kernel {
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gpu.func @private(%arg0: f32) private(%arg1: memref<4xf32, #gpu.address_space<private>>) {
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%c0 = arith.constant 0 : index
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memref.store %arg0, %arg1[%c0] : memref<4xf32, #gpu.address_space<private>>
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gpu.return
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}
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}
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// CHECK-LABEL: llvm.func @private
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// CHECK: llvm.store
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// ROCDL-SAME: : f32, !llvm.ptr<5>
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// NVVM-SAME: : f32, !llvm.ptr
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// -----
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gpu.module @kernel {
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gpu.func @workgroup(%arg0: f32) workgroup(%arg1: memref<4xf32, #gpu.address_space<workgroup>>) {
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%c0 = arith.constant 0 : index
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memref.store %arg0, %arg1[%c0] : memref<4xf32, #gpu.address_space<workgroup>>
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gpu.return
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}
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}
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// CHECK-LABEL: llvm.func @workgroup
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// CHECK: llvm.store
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// CHECK-SAME: : f32, !llvm.ptr<3>
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// -----
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gpu.module @kernel {
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gpu.func @nested_memref(%arg0: memref<4xmemref<4xf32, #gpu.address_space<global>>, #gpu.address_space<global>>) -> f32 {
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%c0 = arith.constant 0 : index
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%inner = memref.load %arg0[%c0] : memref<4xmemref<4xf32, #gpu.address_space<global>>, #gpu.address_space<global>>
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%value = memref.load %inner[%c0] : memref<4xf32, #gpu.address_space<global>>
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gpu.return %value : f32
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}
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}
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// CHECK-LABEL: llvm.func @nested_memref
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// CHECK: llvm.load
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// CHECK-SAME: : !llvm.ptr<1>
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// CHECK: [[value:%.+]] = llvm.load
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// CHECK-SAME: : !llvm.ptr<1> -> f32
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// CHECK: llvm.return [[value]]
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// -----
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gpu.module @kernel {
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gpu.func @dynamic_shmem_with_vector(%arg1: memref<1xf32>) {
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%0 = arith.constant 0 : index
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%1 = gpu.dynamic_shared_memory : memref<?xi8, #gpu.address_space<workgroup>>
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%2 = memref.view %1[%0][] : memref<?xi8, #gpu.address_space<workgroup>> to memref<1xf32, #gpu.address_space<workgroup>>
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%3 = vector.load %2[%0] : memref<1xf32, #gpu.address_space<workgroup>>, vector<1xf32>
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vector.store %3, %arg1[%0] : memref<1xf32>, vector<1xf32>
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gpu.return
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}
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}
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// ROCDL: llvm.mlir.global internal @__dynamic_shmem__0() {addr_space = 3 : i32} : !llvm.array<0 x i8>
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// NVVM: llvm.mlir.global internal @__dynamic_shmem__0() {addr_space = 3 : i32, alignment = 16 : i64} : !llvm.array<0 x i8>
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// CHECK-LABEL: llvm.func @dynamic_shmem_with_vector
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// CHECK: llvm.mlir.addressof @__dynamic_shmem__0 : !llvm.ptr<3>
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// CHECK: llvm.load %{{.*}} {alignment = 4 : i64} : !llvm.ptr<3> -> vector<1xf32>
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// CHECK: llvm.store
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// -----
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gpu.module @kernel {
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gpu.func @dynamic_shmem(%arg0: f32) {
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%0 = arith.constant 0 : index
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%1 = gpu.dynamic_shared_memory : memref<?xi8, #gpu.address_space<workgroup>>
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%2 = memref.view %1[%0][] : memref<?xi8, #gpu.address_space<workgroup>> to memref<4xf32, #gpu.address_space<workgroup>>
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memref.store %arg0, %2[%0] : memref<4xf32, #gpu.address_space<workgroup>>
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gpu.return
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}
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}
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// CHECK-LABEL: llvm.func @dynamic_shmem
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// CHECK: llvm.store
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// CHECK-SAME: : f32, !llvm.ptr<3>
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