236 lines
7.5 KiB
MLIR
236 lines
7.5 KiB
MLIR
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// RUN: mlir-opt -convert-spirv-to-llvm %s | FileCheck %s
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//===----------------------------------------------------------------------===//
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// spirv.IAdd
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @iadd_scalar
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spirv.func @iadd_scalar(%arg0: i32, %arg1: i32) "None" {
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// CHECK: llvm.add %{{.*}}, %{{.*}} : i32
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%0 = spirv.IAdd %arg0, %arg1 : i32
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spirv.Return
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}
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// CHECK-LABEL: @iadd_vector
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spirv.func @iadd_vector(%arg0: vector<4xi64>, %arg1: vector<4xi64>) "None" {
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// CHECK: llvm.add %{{.*}}, %{{.*}} : vector<4xi64>
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%0 = spirv.IAdd %arg0, %arg1 : vector<4xi64>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.ISub
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @isub_scalar
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spirv.func @isub_scalar(%arg0: i8, %arg1: i8) "None" {
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// CHECK: llvm.sub %{{.*}}, %{{.*}} : i8
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%0 = spirv.ISub %arg0, %arg1 : i8
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spirv.Return
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}
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// CHECK-LABEL: @isub_vector
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spirv.func @isub_vector(%arg0: vector<2xi16>, %arg1: vector<2xi16>) "None" {
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// CHECK: llvm.sub %{{.*}}, %{{.*}} : vector<2xi16>
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%0 = spirv.ISub %arg0, %arg1 : vector<2xi16>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.IMul
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @imul_scalar
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spirv.func @imul_scalar(%arg0: i32, %arg1: i32) "None" {
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// CHECK: llvm.mul %{{.*}}, %{{.*}} : i32
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%0 = spirv.IMul %arg0, %arg1 : i32
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spirv.Return
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}
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// CHECK-LABEL: @imul_vector
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spirv.func @imul_vector(%arg0: vector<3xi32>, %arg1: vector<3xi32>) "None" {
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// CHECK: llvm.mul %{{.*}}, %{{.*}} : vector<3xi32>
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%0 = spirv.IMul %arg0, %arg1 : vector<3xi32>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.FAdd
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @fadd_scalar
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spirv.func @fadd_scalar(%arg0: f16, %arg1: f16) "None" {
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// CHECK: llvm.fadd %{{.*}}, %{{.*}} : f16
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%0 = spirv.FAdd %arg0, %arg1 : f16
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spirv.Return
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}
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// CHECK-LABEL: @fadd_vector
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spirv.func @fadd_vector(%arg0: vector<4xf32>, %arg1: vector<4xf32>) "None" {
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// CHECK: llvm.fadd %{{.*}}, %{{.*}} : vector<4xf32>
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%0 = spirv.FAdd %arg0, %arg1 : vector<4xf32>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.FSub
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @fsub_scalar
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spirv.func @fsub_scalar(%arg0: f32, %arg1: f32) "None" {
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// CHECK: llvm.fsub %{{.*}}, %{{.*}} : f32
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%0 = spirv.FSub %arg0, %arg1 : f32
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spirv.Return
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}
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// CHECK-LABEL: @fsub_vector
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spirv.func @fsub_vector(%arg0: vector<2xf32>, %arg1: vector<2xf32>) "None" {
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// CHECK: llvm.fsub %{{.*}}, %{{.*}} : vector<2xf32>
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%0 = spirv.FSub %arg0, %arg1 : vector<2xf32>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.FDiv
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @fdiv_scalar
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spirv.func @fdiv_scalar(%arg0: f32, %arg1: f32) "None" {
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// CHECK: llvm.fdiv %{{.*}}, %{{.*}} : f32
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%0 = spirv.FDiv %arg0, %arg1 : f32
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spirv.Return
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}
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// CHECK-LABEL: @fdiv_vector
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spirv.func @fdiv_vector(%arg0: vector<3xf64>, %arg1: vector<3xf64>) "None" {
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// CHECK: llvm.fdiv %{{.*}}, %{{.*}} : vector<3xf64>
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%0 = spirv.FDiv %arg0, %arg1 : vector<3xf64>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.FMul
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @fmul_scalar
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spirv.func @fmul_scalar(%arg0: f32, %arg1: f32) "None" {
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// CHECK: llvm.fmul %{{.*}}, %{{.*}} : f32
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%0 = spirv.FMul %arg0, %arg1 : f32
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spirv.Return
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}
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// CHECK-LABEL: @fmul_vector
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spirv.func @fmul_vector(%arg0: vector<2xf32>, %arg1: vector<2xf32>) "None" {
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// CHECK: llvm.fmul %{{.*}}, %{{.*}} : vector<2xf32>
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%0 = spirv.FMul %arg0, %arg1 : vector<2xf32>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.FRem
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @frem_scalar
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spirv.func @frem_scalar(%arg0: f32, %arg1: f32) "None" {
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// CHECK: llvm.frem %{{.*}}, %{{.*}} : f32
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%0 = spirv.FRem %arg0, %arg1 : f32
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spirv.Return
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}
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// CHECK-LABEL: @frem_vector
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spirv.func @frem_vector(%arg0: vector<3xf64>, %arg1: vector<3xf64>) "None" {
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// CHECK: llvm.frem %{{.*}}, %{{.*}} : vector<3xf64>
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%0 = spirv.FRem %arg0, %arg1 : vector<3xf64>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.FNegate
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @fneg_scalar
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spirv.func @fneg_scalar(%arg: f64) "None" {
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// CHECK: llvm.fneg %{{.*}} : f64
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%0 = spirv.FNegate %arg : f64
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spirv.Return
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}
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// CHECK-LABEL: @fneg_vector
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spirv.func @fneg_vector(%arg: vector<2xf32>) "None" {
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// CHECK: llvm.fneg %{{.*}} : vector<2xf32>
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%0 = spirv.FNegate %arg : vector<2xf32>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.UDiv
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @udiv_scalar
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spirv.func @udiv_scalar(%arg0: i32, %arg1: i32) "None" {
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// CHECK: llvm.udiv %{{.*}}, %{{.*}} : i32
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%0 = spirv.UDiv %arg0, %arg1 : i32
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spirv.Return
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}
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// CHECK-LABEL: @udiv_vector
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spirv.func @udiv_vector(%arg0: vector<3xi64>, %arg1: vector<3xi64>) "None" {
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// CHECK: llvm.udiv %{{.*}}, %{{.*}} : vector<3xi64>
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%0 = spirv.UDiv %arg0, %arg1 : vector<3xi64>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.UMod
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @umod_scalar
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spirv.func @umod_scalar(%arg0: i32, %arg1: i32) "None" {
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// CHECK: llvm.urem %{{.*}}, %{{.*}} : i32
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%0 = spirv.UMod %arg0, %arg1 : i32
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spirv.Return
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}
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// CHECK-LABEL: @umod_vector
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spirv.func @umod_vector(%arg0: vector<3xi64>, %arg1: vector<3xi64>) "None" {
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// CHECK: llvm.urem %{{.*}}, %{{.*}} : vector<3xi64>
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%0 = spirv.UMod %arg0, %arg1 : vector<3xi64>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.SDiv
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @sdiv_scalar
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spirv.func @sdiv_scalar(%arg0: i16, %arg1: i16) "None" {
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// CHECK: llvm.sdiv %{{.*}}, %{{.*}} : i16
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%0 = spirv.SDiv %arg0, %arg1 : i16
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spirv.Return
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}
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// CHECK-LABEL: @sdiv_vector
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spirv.func @sdiv_vector(%arg0: vector<2xi64>, %arg1: vector<2xi64>) "None" {
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// CHECK: llvm.sdiv %{{.*}}, %{{.*}} : vector<2xi64>
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%0 = spirv.SDiv %arg0, %arg1 : vector<2xi64>
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spirv.Return
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}
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//===----------------------------------------------------------------------===//
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// spirv.SRem
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//===----------------------------------------------------------------------===//
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// CHECK-LABEL: @srem_scalar
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spirv.func @srem_scalar(%arg0: i32, %arg1: i32) "None" {
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// CHECK: llvm.srem %{{.*}}, %{{.*}} : i32
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%0 = spirv.SRem %arg0, %arg1 : i32
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spirv.Return
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}
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// CHECK-LABEL: @srem_vector
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spirv.func @srem_vector(%arg0: vector<4xi32>, %arg1: vector<4xi32>) "None" {
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// CHECK: llvm.srem %{{.*}}, %{{.*}} : vector<4xi32>
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%0 = spirv.SRem %arg0, %arg1 : vector<4xi32>
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spirv.Return
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}
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