229 lines
6.7 KiB
MLIR
229 lines
6.7 KiB
MLIR
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// RUN: mlir-opt %s -split-input-file -pass-pipeline='builtin.module(spirv.module(inline{default-pipeline=''}))' | FileCheck %s
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spirv.module Logical GLSL450 {
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spirv.func @callee() "None" {
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spirv.Return
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}
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// CHECK-LABEL: @calling_single_block_ret_func
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spirv.func @calling_single_block_ret_func() "None" {
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// CHECK-NEXT: spirv.Return
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spirv.FunctionCall @callee() : () -> ()
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spirv.Return
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}
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}
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// -----
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spirv.module Logical GLSL450 {
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spirv.func @callee() -> i32 "None" {
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%0 = spirv.Constant 42 : i32
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spirv.ReturnValue %0 : i32
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}
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// CHECK-LABEL: @calling_single_block_retval_func
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spirv.func @calling_single_block_retval_func() -> i32 "None" {
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// CHECK-NEXT: %[[CST:.*]] = spirv.Constant 42
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%0 = spirv.FunctionCall @callee() : () -> (i32)
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// CHECK-NEXT: spirv.ReturnValue %[[CST]]
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spirv.ReturnValue %0 : i32
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}
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}
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// -----
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spirv.module Logical GLSL450 {
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spirv.GlobalVariable @data bind(0, 0) : !spirv.ptr<!spirv.struct<(!spirv.rtarray<i32> [0])>, StorageBuffer>
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spirv.func @callee() "None" {
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%0 = spirv.mlir.addressof @data : !spirv.ptr<!spirv.struct<(!spirv.rtarray<i32> [0])>, StorageBuffer>
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%1 = spirv.Constant 0: i32
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%2 = spirv.AccessChain %0[%1, %1] : !spirv.ptr<!spirv.struct<(!spirv.rtarray<i32> [0])>, StorageBuffer>, i32, i32
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spirv.Branch ^next
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^next:
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%3 = spirv.Constant 42: i32
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spirv.Store "StorageBuffer" %2, %3 : i32
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spirv.Return
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}
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// CHECK-LABEL: @calling_multi_block_ret_func
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spirv.func @calling_multi_block_ret_func() "None" {
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// CHECK-NEXT: spirv.mlir.addressof
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// CHECK-NEXT: spirv.Constant 0
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// CHECK-NEXT: spirv.AccessChain
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// CHECK-NEXT: spirv.Branch ^bb1
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// CHECK-NEXT: ^bb1:
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// CHECK-NEXT: spirv.Constant
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// CHECK-NEXT: spirv.Store
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// CHECK-NEXT: spirv.Branch ^bb2
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spirv.FunctionCall @callee() : () -> ()
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// CHECK-NEXT: ^bb2:
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// CHECK-NEXT: spirv.Return
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spirv.Return
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}
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}
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// TODO: calling_multi_block_retval_func
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// -----
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spirv.module Logical GLSL450 {
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spirv.func @callee(%cond : i1) -> () "None" {
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spirv.mlir.selection {
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spirv.BranchConditional %cond, ^then, ^merge
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^then:
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spirv.Return
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^merge:
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spirv.mlir.merge
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}
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spirv.Return
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}
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// CHECK-LABEL: @calling_selection_ret_func
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spirv.func @calling_selection_ret_func() "None" {
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%0 = spirv.Constant true
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// CHECK: spirv.FunctionCall
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spirv.FunctionCall @callee(%0) : (i1) -> ()
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spirv.Return
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}
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}
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// -----
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spirv.module Logical GLSL450 {
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spirv.func @callee(%cond : i1) -> () "None" {
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spirv.mlir.selection {
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spirv.BranchConditional %cond, ^then, ^merge
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^then:
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spirv.Branch ^merge
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^merge:
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spirv.mlir.merge
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}
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spirv.Return
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}
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// CHECK-LABEL: @calling_selection_no_ret_func
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spirv.func @calling_selection_no_ret_func() "None" {
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// CHECK-NEXT: %[[TRUE:.*]] = spirv.Constant true
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%0 = spirv.Constant true
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// CHECK-NEXT: spirv.mlir.selection
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// CHECK-NEXT: spirv.BranchConditional %[[TRUE]], ^bb1, ^bb2
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// CHECK-NEXT: ^bb1:
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// CHECK-NEXT: spirv.Branch ^bb2
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// CHECK-NEXT: ^bb2:
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// CHECK-NEXT: spirv.mlir.merge
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spirv.FunctionCall @callee(%0) : (i1) -> ()
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spirv.Return
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}
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}
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// -----
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spirv.module Logical GLSL450 {
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spirv.func @callee(%cond : i1) -> () "None" {
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spirv.mlir.loop {
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spirv.Branch ^header
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^header:
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spirv.BranchConditional %cond, ^body, ^merge
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^body:
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spirv.Return
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^continue:
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spirv.Branch ^header
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^merge:
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spirv.mlir.merge
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}
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spirv.Return
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}
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// CHECK-LABEL: @calling_loop_ret_func
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spirv.func @calling_loop_ret_func() "None" {
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%0 = spirv.Constant true
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// CHECK: spirv.FunctionCall
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spirv.FunctionCall @callee(%0) : (i1) -> ()
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spirv.Return
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}
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}
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// -----
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spirv.module Logical GLSL450 {
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spirv.func @callee(%cond : i1) -> () "None" {
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spirv.mlir.loop {
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spirv.Branch ^header
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^header:
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spirv.BranchConditional %cond, ^body, ^merge
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^body:
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spirv.Branch ^continue
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^continue:
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spirv.Branch ^header
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^merge:
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spirv.mlir.merge
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}
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spirv.Return
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}
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// CHECK-LABEL: @calling_loop_no_ret_func
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spirv.func @calling_loop_no_ret_func() "None" {
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// CHECK-NEXT: %[[TRUE:.*]] = spirv.Constant true
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%0 = spirv.Constant true
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// CHECK-NEXT: spirv.mlir.loop
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// CHECK-NEXT: spirv.Branch ^bb1
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// CHECK-NEXT: ^bb1:
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// CHECK-NEXT: spirv.BranchConditional %[[TRUE]], ^bb2, ^bb4
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// CHECK-NEXT: ^bb2:
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// CHECK-NEXT: spirv.Branch ^bb3
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// CHECK-NEXT: ^bb3:
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// CHECK-NEXT: spirv.Branch ^bb1
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// CHECK-NEXT: ^bb4:
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// CHECK-NEXT: spirv.mlir.merge
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spirv.FunctionCall @callee(%0) : (i1) -> ()
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spirv.Return
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}
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}
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// -----
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spirv.module Logical GLSL450 {
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spirv.GlobalVariable @arg_0 bind(0, 0) : !spirv.ptr<!spirv.struct<(i32 [0])>, StorageBuffer>
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spirv.GlobalVariable @arg_1 bind(0, 1) : !spirv.ptr<!spirv.struct<(i32 [0])>, StorageBuffer>
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// CHECK: @inline_into_selection_region
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spirv.func @inline_into_selection_region() "None" {
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%1 = spirv.Constant 0 : i32
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// CHECK-DAG: [[ADDRESS_ARG0:%.*]] = spirv.mlir.addressof @arg_0
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// CHECK-DAG: [[ADDRESS_ARG1:%.*]] = spirv.mlir.addressof @arg_1
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// CHECK-DAG: [[LOADPTR:%.*]] = spirv.AccessChain [[ADDRESS_ARG0]]
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// CHECK: [[VAL:%.*]] = spirv.Load "StorageBuffer" [[LOADPTR]]
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%2 = spirv.mlir.addressof @arg_0 : !spirv.ptr<!spirv.struct<(i32 [0])>, StorageBuffer>
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%3 = spirv.mlir.addressof @arg_1 : !spirv.ptr<!spirv.struct<(i32 [0])>, StorageBuffer>
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%4 = spirv.AccessChain %2[%1] : !spirv.ptr<!spirv.struct<(i32 [0])>, StorageBuffer>, i32
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%5 = spirv.Load "StorageBuffer" %4 : i32
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%6 = spirv.SGreaterThan %5, %1 : i32
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// CHECK: spirv.mlir.selection
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spirv.mlir.selection {
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spirv.BranchConditional %6, ^bb1, ^bb2
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^bb1: // pred: ^bb0
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// CHECK: [[STOREPTR:%.*]] = spirv.AccessChain [[ADDRESS_ARG1]]
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%7 = spirv.AccessChain %3[%1] : !spirv.ptr<!spirv.struct<(i32 [0])>, StorageBuffer>, i32
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// CHECK-NOT: spirv.FunctionCall
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// CHECK: spirv.AtomicIAdd <Device> <AcquireRelease> [[STOREPTR]], [[VAL]]
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// CHECK: spirv.Branch
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spirv.FunctionCall @atomic_add(%5, %7) : (i32, !spirv.ptr<i32, StorageBuffer>) -> ()
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spirv.Branch ^bb2
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^bb2 : // 2 preds: ^bb0, ^bb1
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spirv.mlir.merge
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}
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// CHECK: spirv.Return
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spirv.Return
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}
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spirv.func @atomic_add(%arg0: i32, %arg1: !spirv.ptr<i32, StorageBuffer>) "None" {
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%0 = spirv.AtomicIAdd <Device> <AcquireRelease> %arg1, %arg0 : !spirv.ptr<i32, StorageBuffer>
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spirv.Return
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}
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spirv.EntryPoint "GLCompute" @inline_into_selection_region
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spirv.ExecutionMode @inline_into_selection_region "LocalSize", 32, 1, 1
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}
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// TODO: Add tests for inlining structured control flow into
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// structured control flow.
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