# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s --- name: test_scalar_add_big body: | bb.0.entry: ; CHECK-LABEL: name: test_scalar_add_big ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3 ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO [[COPY]], [[COPY2]] ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE [[COPY1]], [[COPY3]], [[UADDO1]] ; CHECK-NEXT: $x0 = COPY [[UADDO]](s64) ; CHECK-NEXT: $x1 = COPY [[UADDE]](s64) %0:_(s64) = COPY $x0 %1:_(s64) = COPY $x1 %2:_(s64) = COPY $x2 %3:_(s64) = COPY $x3 %4:_(s128) = G_MERGE_VALUES %0(s64), %1(s64) %5:_(s128) = G_MERGE_VALUES %2(s64), %3(s64) %6:_(s128) = G_ADD %4, %5 %7:_(s64), %8:_(s64) = G_UNMERGE_VALUES %6(s128) $x0 = COPY %7(s64) $x1 = COPY %8(s64) ... --- name: test_scalar_add_big_nonpow2 body: | bb.0.entry: ; CHECK-LABEL: name: test_scalar_add_big_nonpow2 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3 ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO [[COPY]], [[COPY1]] ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE [[COPY1]], [[COPY2]], [[UADDO1]] ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s64), [[UADDE3:%[0-9]+]]:_(s32) = G_UADDE [[COPY2]], [[COPY3]], [[UADDE1]] ; CHECK-NEXT: $x0 = COPY [[UADDO]](s64) ; CHECK-NEXT: $x1 = COPY [[UADDE]](s64) ; CHECK-NEXT: $x2 = COPY [[UADDE2]](s64) %0:_(s64) = COPY $x0 %1:_(s64) = COPY $x1 %2:_(s64) = COPY $x2 %3:_(s64) = COPY $x3 %4:_(s192) = G_MERGE_VALUES %0(s64), %1(s64), %2(s64) %5:_(s192) = G_MERGE_VALUES %1(s64), %2(s64), %3(s64) %6:_(s192) = G_ADD %4, %5 %7:_(s64), %8:_(s64), %9:_(s64) = G_UNMERGE_VALUES %6(s192) $x0 = COPY %7(s64) $x1 = COPY %8(s64) $x2 = COPY %9(s64) ... --- name: test_scalar_add_small body: | bb.0.entry: ; CHECK-LABEL: name: test_scalar_add_small ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[TRUNC1]] ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32) ; CHECK-NEXT: $x0 = COPY [[ANYEXT]](s64) %0:_(s64) = COPY $x0 %1:_(s64) = COPY $x1 %2:_(s8) = G_TRUNC %0(s64) %3:_(s8) = G_TRUNC %1(s64) %4:_(s8) = G_ADD %2, %3 %5:_(s64) = G_ANYEXT %4(s8) $x0 = COPY %5(s64) ... --- name: test_scalar_add_narrowing body: | bb.0.entry: ; CHECK-LABEL: name: test_scalar_add_narrowing ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3 ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO [[COPY]], [[COPY2]] ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE [[COPY1]], [[COPY3]], [[UADDO1]] ; CHECK-NEXT: $x0 = COPY [[UADDO]](s64) ; CHECK-NEXT: $x1 = COPY [[UADDE]](s64) %0:_(s64) = COPY $x0 %1:_(s64) = COPY $x1 %2:_(s64) = COPY $x2 %3:_(s64) = COPY $x3 %4:_(s128) = G_MERGE_VALUES %0(s64), %1(s64) %5:_(s128) = G_MERGE_VALUES %2(s64), %3(s64) %6:_(s96) = G_TRUNC %4(s128) %7:_(s96) = G_TRUNC %5(s128) %8:_(s96) = G_ADD %6, %7 %9:_(s128) = G_ANYEXT %8(s96) %10:_(s64), %11:_(s64) = G_UNMERGE_VALUES %9(s128) $x0 = COPY %10(s64) $x1 = COPY %11(s64) ... --- name: test_scalar_add_narrowing_s65 body: | bb.0.entry: ; CHECK-LABEL: name: test_scalar_add_narrowing_s65 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x3 ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO [[COPY]], [[COPY2]] ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE [[COPY1]], [[COPY3]], [[UADDO1]] ; CHECK-NEXT: $x0 = COPY [[UADDO]](s64) ; CHECK-NEXT: $x1 = COPY [[UADDE]](s64) %0:_(s64) = COPY $x0 %1:_(s64) = COPY $x1 %2:_(s64) = COPY $x2 %3:_(s64) = COPY $x3 %4:_(s128) = G_MERGE_VALUES %0(s64), %1(s64) %5:_(s128) = G_MERGE_VALUES %2(s64), %3(s64) %6:_(s65) = G_TRUNC %4(s128) %7:_(s65) = G_TRUNC %5(s128) %8:_(s65) = G_ADD %6, %7 %9:_(s128) = G_ANYEXT %8(s65) %10:_(s64), %11:_(s64) = G_UNMERGE_VALUES %9(s128) $x0 = COPY %10(s64) $x1 = COPY %11(s64) ... --- name: test_vector_add body: | bb.0.entry: ; CHECK-LABEL: name: test_vector_add ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s64>) = COPY $q2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<2 x s64>) = COPY $q3 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<2 x s64>) = G_ADD [[COPY]], [[COPY2]] ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(<2 x s64>) = G_ADD [[COPY1]], [[COPY3]] ; CHECK-NEXT: $q0 = COPY [[ADD]](<2 x s64>) ; CHECK-NEXT: $q1 = COPY [[ADD1]](<2 x s64>) %0:_(<2 x s64>) = COPY $q0 %1:_(<2 x s64>) = COPY $q1 %2:_(<2 x s64>) = COPY $q2 %3:_(<2 x s64>) = COPY $q3 %4:_(<4 x s64>) = G_CONCAT_VECTORS %0, %1 %5:_(<4 x s64>) = G_CONCAT_VECTORS %2, %3 %6:_(<4 x s64>) = G_ADD %4, %5 %7:_(<2 x s64>), %8:_(<2 x s64>) = G_UNMERGE_VALUES %6(<4 x s64>) $q0 = COPY %7(<2 x s64>) $q1 = COPY %8(<2 x s64>) ... --- name: test_vector_add_v16s16 body: | bb.0.entry: ; CHECK-LABEL: name: test_vector_add_v16s16 ; CHECK: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<8 x s16>) = COPY $q1 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<8 x s16>) = G_ADD [[COPY]], [[COPY]] ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(<8 x s16>) = G_ADD [[COPY1]], [[COPY1]] ; CHECK-NEXT: $q0 = COPY [[ADD]](<8 x s16>) ; CHECK-NEXT: $q1 = COPY [[ADD1]](<8 x s16>) %1:_(<8 x s16>) = COPY $q0 %2:_(<8 x s16>) = COPY $q1 %0:_(<16 x s16>) = G_CONCAT_VECTORS %1(<8 x s16>), %2(<8 x s16>) %3:_(<16 x s16>) = G_ADD %0, %0 %4:_(<8 x s16>), %5:_(<8 x s16>) = G_UNMERGE_VALUES %3(<16 x s16>) $q0 = COPY %4(<8 x s16>) $q1 = COPY %5(<8 x s16>) ... --- name: test_vector_add_v32s8 body: | bb.0.entry: ; CHECK-LABEL: name: test_vector_add_v32s8 ; CHECK: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q1 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<16 x s8>) = G_ADD [[COPY]], [[COPY]] ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(<16 x s8>) = G_ADD [[COPY1]], [[COPY1]] ; CHECK-NEXT: $q0 = COPY [[ADD]](<16 x s8>) ; CHECK-NEXT: $q1 = COPY [[ADD1]](<16 x s8>) %0:_(<16 x s8>) = COPY $q0 %1:_(<16 x s8>) = COPY $q1 %2:_(<32 x s8>) = G_CONCAT_VECTORS %0, %1 %3:_(<32 x s8>) = G_ADD %2, %2 %7:_(<16 x s8>), %8:_(<16 x s8>) = G_UNMERGE_VALUES %3(<32 x s8>) $q0 = COPY %7(<16 x s8>) $q1 = COPY %8(<16 x s8>) ... --- name: test_vector_add_nonpow2 body: | bb.0.entry: ; CHECK-LABEL: name: test_vector_add_nonpow2 ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s64>) = COPY $q2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<2 x s64>) = COPY $q3 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<2 x s64>) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(<2 x s64>) = G_ADD [[COPY1]], [[COPY2]] ; CHECK-NEXT: [[ADD2:%[0-9]+]]:_(<2 x s64>) = G_ADD [[COPY2]], [[COPY3]] ; CHECK-NEXT: $q0 = COPY [[ADD]](<2 x s64>) ; CHECK-NEXT: $q1 = COPY [[ADD1]](<2 x s64>) ; CHECK-NEXT: $q2 = COPY [[ADD2]](<2 x s64>) %0:_(<2 x s64>) = COPY $q0 %1:_(<2 x s64>) = COPY $q1 %2:_(<2 x s64>) = COPY $q2 %3:_(<2 x s64>) = COPY $q3 %4:_(<6 x s64>) = G_CONCAT_VECTORS %0(<2 x s64>), %1(<2 x s64>), %2(<2 x s64>) %5:_(<6 x s64>) = G_CONCAT_VECTORS %1(<2 x s64>), %2(<2 x s64>), %3(<2 x s64>) %6:_(<6 x s64>) = G_ADD %4, %5 %7:_(<2 x s64>), %8:_(<2 x s64>), %9:_(<2 x s64>) = G_UNMERGE_VALUES %6(<6 x s64>) $q0 = COPY %7(<2 x s64>) $q1 = COPY %8(<2 x s64>) $q2 = COPY %9(<2 x s64>) ... --- name: add_v8i16 alignment: 4 tracksRegLiveness: true machineFunctionInfo: {} body: | bb.1: liveins: $q0, $q1 ; CHECK-LABEL: name: add_v8i16 ; CHECK: liveins: $q0, $q1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s16>) = COPY $q0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<8 x s16>) = COPY $q1 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<8 x s16>) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: $q0 = COPY [[ADD]](<8 x s16>) ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:_(<8 x s16>) = COPY $q0 %1:_(<8 x s16>) = COPY $q1 %2:_(<8 x s16>) = G_ADD %0, %1 $q0 = COPY %2(<8 x s16>) RET_ReallyLR implicit $q0 ... --- name: add_v16i8 alignment: 4 tracksRegLiveness: true machineFunctionInfo: {} body: | bb.1: liveins: $q0, $q1 ; CHECK-LABEL: name: add_v16i8 ; CHECK: liveins: $q0, $q1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q1 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<16 x s8>) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: $q0 = COPY [[ADD]](<16 x s8>) ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:_(<16 x s8>) = COPY $q0 %1:_(<16 x s8>) = COPY $q1 %2:_(<16 x s8>) = G_ADD %0, %1 $q0 = COPY %2(<16 x s8>) RET_ReallyLR implicit $q0 ... --- name: add_v4i16 alignment: 4 tracksRegLiveness: true machineFunctionInfo: {} body: | bb.1: liveins: $d0, $d1 ; CHECK-LABEL: name: add_v4i16 ; CHECK: liveins: $d0, $d1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $d1 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<4 x s16>) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: $d0 = COPY [[ADD]](<4 x s16>) ; CHECK-NEXT: RET_ReallyLR implicit $d0 %0:_(<4 x s16>) = COPY $d0 %1:_(<4 x s16>) = COPY $d1 %2:_(<4 x s16>) = G_ADD %0, %1 $d0 = COPY %2(<4 x s16>) RET_ReallyLR implicit $d0 ... --- name: add_v8s8 tracksRegLiveness: true body: | bb.1: liveins: $d0, $d1 ; CHECK-LABEL: name: add_v8s8 ; CHECK: liveins: $d0, $d1 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<8 x s8>) = COPY $d1 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<8 x s8>) = G_ADD [[COPY]], [[COPY1]] ; CHECK-NEXT: $d0 = COPY [[ADD]](<8 x s8>) ; CHECK-NEXT: RET_ReallyLR implicit $d0 %0:_(<8 x s8>) = COPY $d0 %1:_(<8 x s8>) = COPY $d1 %2:_(<8 x s8>) = G_ADD %0, %1 $d0 = COPY %2(<8 x s8>) RET_ReallyLR implicit $d0 ... --- name: add_v2s1 tracksRegLiveness: true body: | bb.1: liveins: $d0, $d1, $d2, $d3 ; CHECK-LABEL: name: add_v2s1 ; CHECK: liveins: $d0, $d1, $d2, $d3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $d1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $d2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<2 x s32>) = COPY $d3 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<2 x s32>) = G_ICMP intpred(eq), [[COPY]](<2 x s32>), [[COPY1]] ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<2 x s32>) = G_ICMP intpred(eq), [[COPY2]](<2 x s32>), [[COPY3]] ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<2 x s32>) = G_ADD [[ICMP]], [[ICMP1]] ; CHECK-NEXT: $d0 = COPY [[ADD]](<2 x s32>) ; CHECK-NEXT: RET_ReallyLR implicit $d0 %0:_(<2 x s32>) = COPY $d0 %1:_(<2 x s32>) = COPY $d1 %2:_(<2 x s32>) = COPY $d2 %3:_(<2 x s32>) = COPY $d3 %4:_(<2 x s1>) = G_ICMP intpred(eq), %0(<2 x s32>), %1 %5:_(<2 x s1>) = G_ICMP intpred(eq), %2(<2 x s32>), %3 %6:_(<2 x s1>) = G_ADD %4, %5 %7:_(<2 x s32>) = G_ANYEXT %6 $d0 = COPY %7:_(<2 x s32>) RET_ReallyLR implicit $d0 ... --- name: add_v3s1 tracksRegLiveness: true body: | bb.1: liveins: $b0, $b1, $b2 ; CHECK-LABEL: name: add_v3s1 ; CHECK: liveins: $b0, $b1, $b2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $b0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s8) = COPY $b1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s8) = COPY $b2 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY]](s8) ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY1]](s8) ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s16) = G_ANYEXT [[COPY2]](s8) ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s16) = G_IMPLICIT_DEF ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s16>) = G_BUILD_VECTOR [[ANYEXT]](s16), [[ANYEXT1]](s16), [[ANYEXT2]](s16), [[DEF]](s16) ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<4 x s16>) = G_ADD [[BUILD_VECTOR]], [[BUILD_VECTOR]] ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16), [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[ADD]](<4 x s16>) ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[UV]](s16) ; CHECK-NEXT: $b0 = COPY [[TRUNC]](s8) ; CHECK-NEXT: RET_ReallyLR implicit $b0 %1:_(s8) = COPY $b0 %2:_(s8) = COPY $b1 %3:_(s8) = COPY $b2 %4:_(<3 x s8>) = G_BUILD_VECTOR %1(s8), %2(s8), %3(s8) %0:_(<3 x s1>) = G_TRUNC %4(<3 x s8>) %5:_(<3 x s1>) = G_ADD %0, %0 %7:_(<3 x s8>) = G_ANYEXT %5(<3 x s1>) %8:_(s8), %9:_(s8), %10:_(s8) = G_UNMERGE_VALUES %7(<3 x s8>) $b0 = COPY %8:_(s8) RET_ReallyLR implicit $b0 ... --- name: add_v4s1 tracksRegLiveness: true body: | bb.1: liveins: $d0, $d1, $d2, $d3 ; CHECK-LABEL: name: add_v4s1 ; CHECK: liveins: $d0, $d1, $d2, $d3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $d1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<4 x s16>) = COPY $d2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<4 x s16>) = COPY $d3 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s16>) = G_ICMP intpred(eq), [[COPY]](<4 x s16>), [[COPY1]] ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<4 x s16>) = G_ICMP intpred(eq), [[COPY2]](<4 x s16>), [[COPY3]] ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<4 x s16>) = G_ADD [[ICMP]], [[ICMP1]] ; CHECK-NEXT: $d0 = COPY [[ADD]](<4 x s16>) ; CHECK-NEXT: RET_ReallyLR implicit $d0 %0:_(<4 x s16>) = COPY $d0 %1:_(<4 x s16>) = COPY $d1 %2:_(<4 x s16>) = COPY $d2 %3:_(<4 x s16>) = COPY $d3 %4:_(<4 x s1>) = G_ICMP intpred(eq), %0(<4 x s16>), %1 %5:_(<4 x s1>) = G_ICMP intpred(eq), %2(<4 x s16>), %3 %6:_(<4 x s1>) = G_ADD %4, %5 %7:_(<4 x s16>) = G_ANYEXT %6 $d0 = COPY %7:_(<4 x s16>) RET_ReallyLR implicit $d0 ... --- name: add_v8s1 tracksRegLiveness: true body: | bb.1: liveins: $d0, $d1, $d2, $d3 ; CHECK-LABEL: name: add_v8s1 ; CHECK: liveins: $d0, $d1, $d2, $d3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s8>) = COPY $d0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<8 x s8>) = COPY $d1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<8 x s8>) = COPY $d2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<8 x s8>) = COPY $d3 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<8 x s8>) = G_ICMP intpred(eq), [[COPY]](<8 x s8>), [[COPY1]] ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<8 x s8>) = G_ICMP intpred(eq), [[COPY2]](<8 x s8>), [[COPY3]] ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<8 x s8>) = G_ADD [[ICMP]], [[ICMP1]] ; CHECK-NEXT: $d0 = COPY [[ADD]](<8 x s8>) ; CHECK-NEXT: RET_ReallyLR implicit $d0 %0:_(<8 x s8>) = COPY $d0 %1:_(<8 x s8>) = COPY $d1 %2:_(<8 x s8>) = COPY $d2 %3:_(<8 x s8>) = COPY $d3 %4:_(<8 x s1>) = G_ICMP intpred(eq), %0(<8 x s8>), %1 %5:_(<8 x s1>) = G_ICMP intpred(eq), %2(<8 x s8>), %3 %6:_(<8 x s1>) = G_ADD %4, %5 %7:_(<8 x s8>) = G_ANYEXT %6 $d0 = COPY %7:_(<8 x s8>) RET_ReallyLR implicit $d0 ... --- name: add_v16s1 tracksRegLiveness: true body: | bb.1: liveins: $q0, $q1, $q2, $q3 ; CHECK-LABEL: name: add_v16s1 ; CHECK: liveins: $q0, $q1, $q2, $q3 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<16 x s8>) = COPY $q1 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(<16 x s8>) = COPY $q2 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(<16 x s8>) = COPY $q3 ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(eq), [[COPY]](<16 x s8>), [[COPY1]] ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<16 x s8>) = G_ICMP intpred(eq), [[COPY2]](<16 x s8>), [[COPY3]] ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<16 x s8>) = G_ADD [[ICMP]], [[ICMP1]] ; CHECK-NEXT: $q0 = COPY [[ADD]](<16 x s8>) ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:_(<16 x s8>) = COPY $q0 %1:_(<16 x s8>) = COPY $q1 %2:_(<16 x s8>) = COPY $q2 %3:_(<16 x s8>) = COPY $q3 %4:_(<16 x s1>) = G_ICMP intpred(eq), %0(<16 x s8>), %1 %5:_(<16 x s1>) = G_ICMP intpred(eq), %2(<16 x s8>), %3 %6:_(<16 x s1>) = G_ADD %4, %5 %7:_(<16 x s8>) = G_ANYEXT %6 $q0 = COPY %7:_(<16 x s8>) RET_ReallyLR implicit $q0 ...