; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s ; ; SQSUB ; define @sqsub_i8_u( %pg, %a, %b) { ; CHECK-LABEL: sqsub_i8_u: ; CHECK: // %bb.0: ; CHECK-NEXT: sqsub z0.b, z0.b, z1.b ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.sqsub.u.nxv16i8( %pg, %a, %b) ret %out } define @sqsub_i16_u( %pg, %a, %b) { ; CHECK-LABEL: sqsub_i16_u: ; CHECK: // %bb.0: ; CHECK-NEXT: sqsub z0.h, z0.h, z1.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.sqsub.u.nxv8i16( %pg, %a, %b) ret %out } define @sqsub_i32_u( %pg, %a, %b) { ; CHECK-LABEL: sqsub_i32_u: ; CHECK: // %bb.0: ; CHECK-NEXT: sqsub z0.s, z0.s, z1.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.sqsub.u.nxv4i32( %pg, %a, %b) ret %out } define @sqsub_i64_u( %pg, %a, %b) { ; CHECK-LABEL: sqsub_i64_u: ; CHECK: // %bb.0: ; CHECK-NEXT: sqsub z0.d, z0.d, z1.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.sqsub.u.nxv2i64( %pg, %a, %b) ret %out } ; ; UQSUB ; define @uqsub_i8_u( %pg, %a, %b) { ; CHECK-LABEL: uqsub_i8_u: ; CHECK: // %bb.0: ; CHECK-NEXT: uqsub z0.b, z0.b, z1.b ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.uqsub.u.nxv16i8( %pg, %a, %b) ret %out } define @uqsub_i16_u( %pg, %a, %b) { ; CHECK-LABEL: uqsub_i16_u: ; CHECK: // %bb.0: ; CHECK-NEXT: uqsub z0.h, z0.h, z1.h ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.uqsub.u.nxv8i16( %pg, %a, %b) ret %out } define @uqsub_i32_u( %pg, %a, %b) { ; CHECK-LABEL: uqsub_i32_u: ; CHECK: // %bb.0: ; CHECK-NEXT: uqsub z0.s, z0.s, z1.s ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.uqsub.u.nxv4i32( %pg, %a, %b) ret %out } define @uqsub_i64_u( %pg, %a, %b) { ; CHECK-LABEL: uqsub_i64_u: ; CHECK: // %bb.0: ; CHECK-NEXT: uqsub z0.d, z0.d, z1.d ; CHECK-NEXT: ret %out = call @llvm.aarch64.sve.uqsub.u.nxv2i64( %pg, %a, %b) ret %out } declare @llvm.aarch64.sve.uqsub.u.nxv16i8(, , ) declare @llvm.aarch64.sve.uqsub.u.nxv8i16(, , ) declare @llvm.aarch64.sve.uqsub.u.nxv4i32(, , ) declare @llvm.aarch64.sve.uqsub.u.nxv2i64(, , ) declare @llvm.aarch64.sve.sqsub.u.nxv16i8(, , ) declare @llvm.aarch64.sve.sqsub.u.nxv8i16(, , ) declare @llvm.aarch64.sve.sqsub.u.nxv4i32(, , ) declare @llvm.aarch64.sve.sqsub.u.nxv2i64(, , )