; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p1 -mattr=+b16b16 -verify-machineinstrs < %s | FileCheck %s define @bfmls_m( %pg, %a, %b, %c){ ; CHECK-LABEL: bfmls_m: ; CHECK: // %bb.0: ; CHECK-NEXT: bfmls z0.h, p0/m, z1.h, z2.h ; CHECK-NEXT: ret %res = call @llvm.aarch64.sve.fmls.nxv8bf16( %pg, %a, %b, %c) ret %res } define @bfmls_x( %pg, %a, %b, %c){ ; CHECK-LABEL: bfmls_x: ; CHECK: // %bb.0: ; CHECK-NEXT: bfmls z0.h, p0/m, z1.h, z2.h ; CHECK-NEXT: ret %res = call @llvm.aarch64.sve.fmls.u.nxv8bf16( %pg, %a, %b, %c) ret %res } define @bfmls_z( %pg, %a, %b, %c){ ; CHECK-LABEL: bfmls_z: ; CHECK: // %bb.0: ; CHECK-NEXT: mov z3.h, #0 // =0x0 ; CHECK-NEXT: sel z0.h, p0, z0.h, z3.h ; CHECK-NEXT: bfmls z0.h, p0/m, z1.h, z2.h ; CHECK-NEXT: ret %a_z = select %pg, %a, zeroinitializer %res = call @llvm.aarch64.sve.fmls.nxv8bf16( %pg, %a_z, %b, %c) ret %res } declare @llvm.aarch64.sve.fmls.nxv8bf16(, , , ) declare @llvm.aarch64.sve.fmls.u.nxv8bf16(, , , )